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micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="T9lGne2QQapOBRac" Content-Disposition: inline In-Reply-To: <7c445195e17e15d5af5fcb30ae53f76c713e958b.camel@mediatek.com> X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on agentk.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (agentk.vger.email [0.0.0.0]); Wed, 27 Sep 2023 02:49:54 -0700 (PDT) --T9lGne2QQapOBRac Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Wed, Sep 27, 2023 at 07:19:28AM +0000, Moudy Ho (=E4=BD=95=E5=AE=97=E5= =8E=9F) wrote: > On Fri, 2023-09-22 at 16:51 +0100, Conor Dooley wrote: > > On Fri, Sep 22, 2023 at 04:49:14PM +0100, Conor Dooley wrote: > > > On Fri, Sep 22, 2023 at 03:21:12PM +0800, Moudy Ho wrote: > > > > Add a compatible string for the COLOR block in MediaTek MT8195 > > > > that > > > > is controlled by MDP3. > > > >=20 > > > > Signed-off-by: Moudy Ho > > > > --- > > > > .../devicetree/bindings/display/mediatek/mediatek,color.yaml =20 > > > > | 1 + > > > > 1 file changed, 1 insertion(+) > > > >=20 > > > > diff --git > > > > a/Documentation/devicetree/bindings/display/mediatek/mediatek,col > > > > or.yaml > > > > b/Documentation/devicetree/bindings/display/mediatek/mediatek,col > > > > or.yaml > > > > index f21e44092043..b886ca0d89ea 100644 > > > > --- > > > > a/Documentation/devicetree/bindings/display/mediatek/mediatek,col > > > > or.yaml > > > > +++ > > > > b/Documentation/devicetree/bindings/display/mediatek/mediatek,col > > > > or.yaml > > > > @@ -26,6 +26,7 @@ properties: > > > > - mediatek,mt2701-disp-color > > > > - mediatek,mt8167-disp-color > > > > - mediatek,mt8173-disp-color > > > > + - mediatek,mt8195-mdp3-color > > >=20 > > > How come this one is a "mdp3" not a "disp"? > >=20 > > I don't know what mdp3 means & googling gives me no answers. What's > > the > > "disp" one controlled by, since it isn't controlled by mdp3? > >=20 >=20 > Hi Conor, >=20 > Mediatek's Media Data Path ver.3 (MDP3) is associated with MMSYS and > acts as an independent driver that operates between VDEC and DISP. > By controlling multiple components, it carries out tasks like > converting color formats, resizing, and applying specific Picture > Quality (PQ) effects. > The driver can be found at "driver/media/platform/mediatek/mdp3". > Since the same hardware components are configured in both MDP3 and > DISP, considering previous discussions, I attemped to integrate into a > single binding, named after the controlling user. I'm still kinda struggling to understand this. Do you mean that the hardware can be controlled by either of the disp and mdp3 drivers, and a compatible containing "disp" would use one driver, and one containing "mdp3" would use another? --T9lGne2QQapOBRac Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQRh246EGq/8RLhDjO14tDGHoIJi0gUCZRP6PgAKCRB4tDGHoIJi 0kh7AP9O7MKYjrnar798S6fbop9AWuqH31/FShl/0JtdCf2N/wD/R/G17q/VHosy cmzXFHme+vk2cMO0cR0geJwglqggtQo= =5FSm -----END PGP SIGNATURE----- --T9lGne2QQapOBRac--