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Subject: RE: [PATCH v5 11/11] iommu/vt-d: Disallow read-only mappings to nest
 parent domain
Thread-Topic: [PATCH v5 11/11] iommu/vt-d: Disallow read-only mappings to nest
 parent domain
Thread-Index: AQHZ7GDx4grbuXbuGUS8prD2gWWqDLAuSNxA
Date:   Wed, 27 Sep 2023 07:04:31 +0000
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 <20230921075431.125239-12-yi.l.liu@intel.com>
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> From: Liu, Yi L <yi.l.liu@intel.com>
> Sent: Thursday, September 21, 2023 3:55 PM
>=20
> From: Lu Baolu <baolu.lu@linux.intel.com>
>=20
> When remapping hardware is configured by system software in scalable
> mode
> as Nested (PGTT=3D011b) and with PWSNP field Set in the PASID-table-entry=
,
> it may Set Accessed bit and Dirty bit (and Extended Access bit if enabled=
)
> in first-stage page-table entries even when second-stage mappings indicat=
e
> that corresponding first-stage page-table is Read-Only.
>=20
> As the result, contents of pages designated by VMM as Read-Only can be
> modified by IOMMU via PML5E (PML4E for 4-level tables) access as part of
> address translation process due to DMAs issued by Guest.
>=20
> This disallows read-only mappings in the domain that is supposed to be us=
ed
> as nested parent. Reference from Sapphire Rapids Specification Update [1]=
,
> errata details, SPR17. Userspace should know this limitation by checking
> the IOMMU_HW_INFO_VTD_ERRATA_772415_SPR17 flag reported in the
> IOMMU_GET_HW_INFO
> ioctl.
>=20
> [1] https://www.intel.com/content/www/us/en/content-
> details/772415/content-details.html
>=20
> Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
> Signed-off-by: Yi Liu <yi.l.liu@intel.com>

Reviewed-by: Kevin Tian <kevin.tian@intel.com>