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From:   Thomas Gleixner <tglx@linutronix.de>
To:     Wei Gong <gongwei833x@gmail.com>
Cc:     linux-kernel@vger.kernel.org, gongwei833x@gmail.com
Subject: Re: [PATCH v2] genirq: avoid long loops in handle_edge_irq
In-Reply-To: <ZRPfjC9JEeUx8zKY@MacBook-Pro-3.local>
References: <20230925025154.37959-1-gongwei833x@gmail.com>
 <87msx9f7a2.ffs@tglx> <ZRPfjC9JEeUx8zKY@MacBook-Pro-3.local>
Date:   Wed, 27 Sep 2023 17:25:24 +0200
Message-ID: <87edijfxjv.ffs@tglx>
MIME-Version: 1.0
Content-Type: text/plain
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On Wed, Sep 27 2023 at 15:53, Wei Gong wrote:
> O Tue, Sep 26, 2023 at 02:28:21PM +0200, Thomas Gleixner wrote:
>> On Mon, Sep 25 2023 at 10:51, Wei Gong wrote:
>> > diff --git a/kernel/irq/chip.c b/kernel/irq/chip.c
>> > index dc94e0bf2c94..6da455e1a692 100644
>> > --- a/kernel/irq/chip.c
>> > +++ b/kernel/irq/chip.c
>> > @@ -831,7 +831,8 @@ void handle_edge_irq(struct irq_desc *desc)
>> >  		handle_irq_event(desc);
>> >  
>> >  	} while ((desc->istate & IRQS_PENDING) &&
>> > -		 !irqd_irq_disabled(&desc->irq_data));
>> > +		 !irqd_irq_disabled(&desc->irq_data) &&
>> > +		 cpumask_test_cpu(smp_processor_id(), irq_data_get_affinity_mask(&desc->irq_data)));
>> 
>> Assume affinty mask has CPU0 and CPU1 set and the loop is on CPU0, but
>> the effective affinity is on CPU1 then how is this going to move the
>> interrupt?
>
> Loop is on the CPU0 means that the previous effective affinity was on CPU0.
> When the previous effective affinity is a subset of the new affinity mask,
> the effective affinity will not be updated.

That's an implementation detail of a particular interrupt chip driver,
but not a general guaranteed behaviour.