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Date:   Wed, 27 Sep 2023 14:12:39 +0200
From:   Andrew Lunn <andrew@lunn.ch>
To:     Fabio Estevam <festevam@gmail.com>
Cc:     kuba@kernel.org, f.fainelli@gmail.com, olteanv@gmail.com,
        davem@davemloft.net, edumazet@google.com, pabeni@redhat.com,
        l00g33k@gmail.com, netdev@vger.kernel.org,
        linux-kernel@vger.kernel.org, Fabio Estevam <festevam@denx.de>,
        Florian Fainelli <florian.fainelli@broadcom.com>
Subject: Re: [PATCH v3 net] net: dsa: mv88e6xxx: Avoid EEPROM timeout when
 EEPROM is absent
Message-ID: <3f3acf78-f4be-47ff-a976-b60b327c2c28@lunn.ch>
References: <20230922124741.360103-1-festevam@gmail.com>
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On Fri, Sep 22, 2023 at 09:47:41AM -0300, Fabio Estevam wrote:
> From: Fabio Estevam <festevam@denx.de>
> 
> Since commit 23d775f12dcd ("net: dsa: mv88e6xxx: Wait for EEPROM done
> before HW reset") the following error is seen on a imx8mn board with
> a 88E6320 switch:
> 
> mv88e6085 30be0000.ethernet-1:00: Timeout waiting for EEPROM done
> 
> This board does not have an EEPROM attached to the switch though.
> 
> This problem is well explained by Andrew Lunn:
> 
> "If there is an EEPROM, and the EEPROM contains a lot of data, it could
> be that when we perform a hardware reset towards the end of probe, it
> interrupts an I2C bus transaction, leaving the I2C bus in a bad state,
> and future reads of the EEPROM do not work.
> 
> The work around for this was to poll the EEInt status and wait for it
> to go true before performing the hardware reset.
> 
> However, we have discovered that for some boards which do not have an
> EEPROM, EEInt never indicates complete. As a result,
> mv88e6xxx_g1_wait_eeprom_done() spins for a second and then prints a
> warning.
> 
> We probably need a different solution than calling
> mv88e6xxx_g1_wait_eeprom_done(). The datasheet for 6352 documents the
> EEPROM Command register:
> 
> bit 15 is:
> 
>   EEPROM Unit Busy. This bit must be set to a one to start an EEPROM
>   operation (see EEOp below). Only one EEPROM operation can be
>   executing at one time so this bit must be zero before setting it to
>   a one.  When the requested EEPROM operation completes this bit will
>   automatically be cleared to a zero. The transition of this bit from
>   a one to a zero can be used to generate an interrupt (the EEInt in
>   Global 1, offset 0x00).
> 
> and more interesting is bit 11:
> 
>   Register Loader Running. This bit is set to one whenever the
>   register loader is busy executing instructions contained in the
>   EEPROM."
> 
> Change to using mv88e6xxx_g2_eeprom_wait() to fix the timeout error
> when the EEPROM chip is not present.
>   
> Fixes: 23d775f12dcd ("net: dsa: mv88e6xxx: Wait for EEPROM done before HW reset")
> Suggested-by: Andrew Lunn <andrew@lunn.ch>
> Signed-off-by: Fabio Estevam <festevam@denx.de>
> Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com>

Reviewed-by: Andrew Lunn <andrew@lunn.ch>

    Andrew