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Date:   Wed, 27 Sep 2023 16:02:06 -0700
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Subject: Re: [PATCH v2 3/4] Documentation/x86: Document resctrl's new
 sparse_masks
Content-Language: en-US
To:     Reinette Chatre <reinette.chatre@intel.com>, <babu.moger@amd.com>,
        "Maciej Wieczor-Retman" <maciej.wieczor-retman@intel.com>,
        Thomas Gleixner <tglx@linutronix.de>,
        Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
        Dave Hansen <dave.hansen@linux.intel.com>, <x86@kernel.org>,
        "H. Peter Anvin" <hpa@zytor.com>, Jonathan Corbet <corbet@lwn.net>
CC:     <linux-kernel@vger.kernel.org>, <linux-doc@vger.kernel.org>
References: <cover.1695371055.git.maciej.wieczor-retman@intel.com>
 <308c92438288a45a12330af83aa0088a31f60343.1695371055.git.maciej.wieczor-retman@intel.com>
 <17079b9e-4efd-4258-2b5f-afc6d3ae2c0f@amd.com>
 <bced7bc7-c489-7a57-374f-62818cbfded6@intel.com>
From:   Fenghua Yu <fenghua.yu@intel.com>
In-Reply-To: <bced7bc7-c489-7a57-374f-62818cbfded6@intel.com>
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On 9/27/23 15:58, Reinette Chatre wrote:
> Hi Babu,
> 
> On 9/27/2023 3:47 PM, Moger, Babu wrote:
>> On 9/22/2023 3:48 AM, Maciej Wieczor-Retman wrote:
>>> From: Fenghua Yu <fenghua.yu@intel.com>
>>>
>>> The documentation mentions that non-contiguous bit masks are not
>>> supported in Intel Cache Allocation Technology (CAT).
>>>
>>> Update the documentation on how to determine if sparse bit masks are
>>> allowed in L2 and L3 CAT.
>>>
>>> Mention the file with feature support information is located in
>>> the /sys/fs/resctrl/info/{resource}/ directories and enumerate what
>>> are the possible outputs on file read operation.
>>>
>>> Signed-off-by: Fenghua Yu <fenghua.yu@intel.com>
>>> Signed-off-by: Maciej Wieczor-Retman <maciej.wieczor-retman@intel.com>
>>> ---
>>> Changelog v2:
>>> - Change bitmap naming convention to bit mask. (Reinette)
>>>
>>>    Documentation/arch/x86/resctrl.rst | 16 ++++++++++++----
>>>    1 file changed, 12 insertions(+), 4 deletions(-)
>>>
>>> diff --git a/Documentation/arch/x86/resctrl.rst b/Documentation/arch/x86/resctrl.rst
>>> index cb05d90111b4..4c6421e2aa31 100644
>>> --- a/Documentation/arch/x86/resctrl.rst
>>> +++ b/Documentation/arch/x86/resctrl.rst
>>> @@ -124,6 +124,13 @@ related to allocation:
>>>                "P":
>>>                      Corresponding region is pseudo-locked. No
>>>                      sharing allowed.
>>> +"sparse_masks":
>>> +        Indicates if non-contiguous 1s value in CBM is supported.
>>> +
>>> +            "0":
>>> +                  Only contiguous 1s value in CBM is supported.
>>
>> This is little confusing. How about?
>>
>> Non-contiguous 1s value in CBM is not supported
>>
> 
> It is not clear to me how changing it to a double
> negative reduces confusion.
Agree with Reinette.

The original statement is clearer and more direct to explicitly state 
what is supported without introducing a negative assertion (not supported).

Thanks.

-Fenghua