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Wed, 27 Sep 2023 09:05:10 -0700 (PDT) Dan, On 27.09.23 17:43:19, Robert Richter wrote: > Changes in v11: > - Rebased onto cxl/fixes (c66650d29764) > - Added: cxl/port: Fix release of RCD endpoints > - Added: cxl/core/regs: Rename @dev to @host in struct cxl_register_map > - Added: cxl/port: Fix @host confusion in cxl_dport_setup_regs() > - Added: cxl/port: Rename @comp_map to @reg_map in struct cxl_register_map > - Removed: cxl/regs: Prepare for multiple users of register mappings > - Modified: cxl/hdm: Use stored Component Register mappings to map > HDM decoder capability > - Dan: rework to drop cxl_port_get_comp_map() > - Added: cxl/pci: Introduce config option PCIEAER_CXL > - Modified: cxl/pci: Add RCH downstream port AER register discovery > - Moved AER discovery to devm_cxl_setup_parent_dport() called when > memdev is probed > - Fixed devm_cxl_iomap_block() release by fixing devm host > - Modified: cxl/pci: Map RCH downstream AER registers for logging > protocol errors > - Reworded description > - Moved register mappings to devm_cxl_setup_parent_dport() called > when memdev is probed > - Modified: cxl/pci: Disable root port interrupts in RCH mode > - Call cxl_disable_rch_root_ints() in devm_cxl_setup_parent_dport() > called when memdev is probed > - Fixed resource release by fixing devm host > - Reworded description of PCIEAER_CXL config option > - Added: cxl/core/regs: Rework cxl_map_pmu_regs() to use map->dev for > devm for a v11 this is a major rework. Most of the dport setup is now in devm_cxl_setup_parent_dport() which is called very late from cxl_mem_probe(). Also, additional patches with fixes and more reworks. I saw one failure in the ndctl cxl test suite with qemu, but decided to send the patches out anyway as a new baseline for review, testing and debugging. Bear with it as due to its changes the code need to mature a little. Thanks, -Robert