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 <CAMuHMdWc6yy=oJDo4zMdvB-t8pjCuE1oJ_Y6Ck0aX_hPkfhPug@mail.gmail.com> <154b823e-d532-ede7-5ada-08436ec86804@tuxon.dev>
In-Reply-To: <154b823e-d532-ede7-5ada-08436ec86804@tuxon.dev>
From:   Geert Uytterhoeven <geert@linux-m68k.org>
Date:   Thu, 28 Sep 2023 09:25:28 +0200
Message-ID: <CAMuHMdVGWNHxjh6o9bWiuLfbCTd41n232Q5p+onHrM5Urm-d2w@mail.gmail.com>
Subject: Re: [PATCH 21/37] dt-bindings: clock: add r9a08g045 CPG clocks and
 resets definitions
To:     claudiu beznea <claudiu.beznea@tuxon.dev>
Cc:     mturquette@baylibre.com, sboyd@kernel.org, robh+dt@kernel.org,
        krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org,
        ulf.hansson@linaro.org, linus.walleij@linaro.org,
        gregkh@linuxfoundation.org, jirislaby@kernel.org,
        magnus.damm@gmail.com, catalin.marinas@arm.com, will@kernel.org,
        prabhakar.mahadev-lad.rj@bp.renesas.com,
        biju.das.jz@bp.renesas.com, quic_bjorande@quicinc.com,
        arnd@arndb.de, konrad.dybcio@linaro.org, neil.armstrong@linaro.org,
        nfraprado@collabora.com, rafal@milecki.pl,
        wsa+renesas@sang-engineering.com,
        linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org,
        devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
        linux-mmc@vger.kernel.org, linux-gpio@vger.kernel.org,
        linux-serial@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
        Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
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Hi Claudiu,

On Thu, Sep 28, 2023 at 6:54 AM claudiu beznea <claudiu.beznea@tuxon.dev> wrote:
> On 15.09.2023 14:59, Geert Uytterhoeven wrote:
> > On Tue, Sep 12, 2023 at 6:53 AM Claudiu <claudiu.beznea@tuxon.dev> wrote:
> >> From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
> >>
> >> Add RZ/G3S (R9A08G045) Clock Pulse Generator (CPG) core clocks, module
> >> clocks and resets.
> >>
> >> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
> >
> > Thanks for your patch!
> >
> >> --- /dev/null
> >> +++ b/include/dt-bindings/clock/r9a08g045-cpg.h
> >
> >> +/* R9A08G045 Module Clocks */
> >
> >> +#define R9A08G045_USB_U2H0_HCLK                65
> >> +#define R9A08G045_USB_U2H1_HCLK                66
> >> +#define R9A08G045_USB_U2P_EXR_CPUCLK   67
> >> +#define R9A08G045_USB_PCLK             68
> >> +#define R9A08G045_USB_SCLK             69
> >
> > There is no USB_SCLK bit in CPG_CLKON_USB, so please drop
> > R9A08G045_USB_SCLK.
> >
> >> +/* R9A08G045 Resets */
> >
> >> +#define R9A08G045_SRAM_ACPU_ARESETN0   11
> >> +#define R9A08G045_SRAM_ACPU_ARESETN1   12
> >> +#define R9A08G045_SRAM_ACPU_ARESETN2   13
> >
> > There is no SRAM_ACPU_ARESETN2 bit in CPG_RST_SRAM_MCPU,
> > so please drop R9A08G045_SRAM_ACPU_ARESETN2.
>
> I see there is SRAM_ACPU_ARESETN2 in CPG_RST_SRAM_*A*CPU register. You are
> actually saying that the documentation might be wrong?

My mistake, I looked at the wrong register.

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds