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[188.141.3.169]) by smtp.gmail.com with ESMTPSA id y19-20020a1c4b13000000b00405bbfd5d16sm1685765wma.7.2023.09.29.08.52.20 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 29 Sep 2023 08:52:21 -0700 (PDT) Message-ID: Date: Fri, 29 Sep 2023 16:52:20 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 2/3] arm64: dts: qcom: sc7280: Add Camera Control Interface busses Content-Language: en-US To: Konrad Dybcio , Bryan O'Donoghue , Luca Weiss , Andy Gross , Bjorn Andersson , Loic Poulain , Robert Foss , Andi Shyti , Rob Herring , Krzysztof Kozlowski , Conor Dooley , cros-qcom-dts-watchers@chromium.org Cc: ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, linux-i2c@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20230929-sc7280-cci-v1-0-16c7d386f062@fairphone.com> <20230929-sc7280-cci-v1-2-16c7d386f062@fairphone.com> <8dd470e5-ce33-3d33-98f1-e66935ca7b56@linaro.org> <1b5bd391-4bb0-44ac-88d1-e326bec4dd7d@nexus-software.ie> From: Bryan O'Donoghue In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on groat.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (groat.vger.email [0.0.0.0]); Fri, 29 Sep 2023 08:52:37 -0700 (PDT) On 29/09/2023 16:25, Konrad Dybcio wrote: >> Not actually a required clock for the clock controller. >> >> I suspect the same is true for dispcc and videocc though it would also mean the respective drivers would need to switch on <&gcc DISPx_CAMERA_AHB_CLK> or <&gcc GCC_VIDEO_AHB_CLK> prior to accessing registers inside the ip blocks which may not currently be the case. >> >> Feels like a bit of a contrary answer but my reading is the GCC_IPBLOCK_AHB_CLK clocks belong in the drivers not the clock controllers..  or at least that's true for sm8250/camcc > I believe the idea here would be that registering GCC_IP_AHB_CLK > as a pm_clk for the clock controller would make that clock turn > on when IPBLOCK_CC is accessed (e.g. when we turn on > IPBLOCK_CORE_CLK), so that it doesn't need to be duplicated in > each and every end device. > > Konrad Yeah I mean I accept the logic - the core AHB clock is effectively gated by the ipblockcc even though they originate from different places in hardware - and _when_ do you want one clock without the other ? Never except at probe() time for the ipblockcc. Then again if you can show the clock dependency tree of camera or disp requires GCC_IP_AHB_CLK you could make the argument the dt requires the clock dependency defined in that block. I'd say we should offline this from Luca's patches tho :) for me anyway the first two are fine. Agree #3 is verboten. No new empty nodes. --- bod