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[178.235.177.217]) by smtp.gmail.com with ESMTPSA id g27-20020ac5c5db000000b0049d1de0fa44sm102807vkl.28.2023.09.29.07.18.57 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 29 Sep 2023 07:19:01 -0700 (PDT) Message-ID: Date: Fri, 29 Sep 2023 16:18:56 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 2/3] arm64: dts: qcom: sc7280: Add Camera Control Interface busses Content-Language: en-US To: Bryan O'Donoghue , Luca Weiss , Andy Gross , Bjorn Andersson , Loic Poulain , Robert Foss , Andi Shyti , Rob Herring , Krzysztof Kozlowski , Conor Dooley , cros-qcom-dts-watchers@chromium.org, Bryan O'Donoghue Cc: ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, linux-i2c@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20230929-sc7280-cci-v1-0-16c7d386f062@fairphone.com> <20230929-sc7280-cci-v1-2-16c7d386f062@fairphone.com> <8dd470e5-ce33-3d33-98f1-e66935ca7b56@linaro.org> <1b5bd391-4bb0-44ac-88d1-e326bec4dd7d@nexus-software.ie> From: Konrad Dybcio Autocrypt: addr=konrad.dybcio@linaro.org; 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charset=UTF-8 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on agentk.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (agentk.vger.email [0.0.0.0]); Fri, 29 Sep 2023 07:19:32 -0700 (PDT) On 29.09.2023 16:15, Bryan O'Donoghue wrote: > On 29/09/2023 14:35, Konrad Dybcio wrote: >> >> >> On 9/29/23 10:01, Luca Weiss wrote: >>> Add the CCI busses found on sc7280 and their pinctrl states. >>> >>> Signed-off-by: Luca Weiss >>> --- >>>   arch/arm64/boot/dts/qcom/sc7280.dtsi | 136 +++++++++++++++++++++++++++++++++++ >>>   1 file changed, 136 insertions(+) >>> >>> diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi >>> index 66f1eb83cca7..65550de2e4ff 100644 >>> --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi >>> +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi >>> @@ -3793,6 +3793,86 @@ videocc: clock-controller@aaf0000 { >>>               #power-domain-cells = <1>; >>>           }; >>> +        cci0: cci@ac4a000 { >>> +            compatible = "qcom,sc7280-cci", "qcom,msm8996-cci"; >>> +            reg = <0 0x0ac4a000 0 0x1000>; >>> +            interrupts = ; >>> +            power-domains = <&camcc CAM_CC_TITAN_TOP_GDSC>; >>> + >>> +            clocks = <&camcc CAM_CC_CAMNOC_AXI_CLK>, >>> +                 <&camcc CAM_CC_SLOW_AHB_CLK_SRC>, >>> +                 <&camcc CAM_CC_CPAS_AHB_CLK>, >>> +                 <&camcc CAM_CC_CCI_0_CLK>, >>> +                 <&camcc CAM_CC_CCI_0_CLK_SRC>; >>> +            clock-names = "camnoc_axi", >>> +                      "slow_ahb_src", >>> +                      "cpas_ahb", >>> +                      "cci", >>> +                      "cci_src"; >> I guess this is more of a question to e.g. Bryan, but are all of these clocks actually necessary? >> >> Konrad > Hmm its a good question, we generally take the approach of adopting all of the downstream clocks for these camera interfaces verbatim. > > The clock plan for this part only calls out cci_X_clk and cci_x_clk_src for the CCI however we know that to be incomplete since we *absolutely* need to have the AXI for the block clocked to access those registers, same deal with the AHB bus. > > AXI: registers > AHB: data > > In the above list the only clock you might conceivably not need is CPAS_AHB_CLK. > > Let me zap that clock from sdm845 since I have an rb3 right in front of me and see what happens. > > Crash and reset > > --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi > +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi > @@ -4402,13 +4402,11 @@ cci: cci@ac4a000 { >                         clocks = <&clock_camcc CAM_CC_CAMNOC_AXI_CLK>, >                                 <&clock_camcc CAM_CC_SOC_AHB_CLK>, >                                 <&clock_camcc CAM_CC_SLOW_AHB_CLK_SRC>, > -                               <&clock_camcc CAM_CC_CPAS_AHB_CLK>, >                                 <&clock_camcc CAM_CC_CCI_CLK>, >                                 <&clock_camcc CAM_CC_CCI_CLK_SRC>; >                         clock-names = "camnoc_axi", >                                 "soc_ahb", >                                 "slow_ahb_src", > -                               "cpas_ahb", >                                 "cci", >                                 "cci_src"; > > > I think the list is good tbh WDYT about camcc consuming ahb, like dispcc does? AXI, hmm.. not quite sure what to do with it Konrad