Received: by 2002:a05:7412:3784:b0:e2:908c:2ebd with SMTP id jk4csp103105rdb; Fri, 29 Sep 2023 19:06:21 -0700 (PDT) X-Google-Smtp-Source: AGHT+IETjuidWrQkpmG0Xe5ntmyEXZB1jqN0EWT4jMdeYHw/XTycXzAk5XSDTkHB9I7VYBxZkYe6 X-Received: by 2002:a05:6a20:144f:b0:14e:b4d5:782d with SMTP id a15-20020a056a20144f00b0014eb4d5782dmr5665210pzi.2.1696039581422; Fri, 29 Sep 2023 19:06:21 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1696039581; cv=none; d=google.com; s=arc-20160816; b=b+NmSYQhw7W3J9wdC4EssSnFEr/oB9zKX6Bb6kjHFi1XgoeXTh8dTAO9PWhBSVX69o ZB/5uzB4y1YTDyUZegQ/N2dwwhrxNv+KWvdjW3lrRXB1FQHjd5Z3blDR8X88AFTygA2Y QAu0HvQnQnbsM2vR5YOW27sq6f3jJb63ff4Sy/sDzl/YRNXq5J1ge9TBxvp7v1YAKbq/ +tPuaavFCmpjlkQJZNda9Dp7gEFASkqoCSD7g/1589coMXW2z8aq+fsvUNA2wUmhVNn/ 6zsHP0h0howzRT9FypQmvLaxxPLt6tqvafI+CL6czf93y7XO68fQFFfKH4VkmAEc0ang Pd0A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:in-reply-to:content-transfer-encoding :content-disposition:mime-version:references:message-id:subject:cc :to:from:date:dkim-signature; bh=nlD9KADVAnsjn+gO7bWL+fNHss77sR+xOmC5q0Oo7Fw=; fh=ptkWKGWlQNIik+BEoFpIdNhogIbzLH4KDmABrVZ+/f0=; b=lUEEmwL/9+WlwvJCVMiaYJcNI8zeCuXG3CIKOorlMNmwn3PSP6XahrVrXh+dmQHQmn 6sIpfVL010eM2qKVHnuLBoc8rBeJhlxOwphsXB06AWnxKOVUNf2Uu8qggXHRuP1Kivty /BqRv3p1gwo1rKJONagepjY8N7UtRWHlt+6WaT34DlHBWhbnW4JvvJJC7V32evTw0Ndd dTdIKDVxDfx4zX89xM4nIfVM91s/tAuv8fhcW6adJ9hljOnnTA+dKuW+geKKSb9h9pLC rriCPfpFhLL9YgeWQ90IFm2ktCjcRhrshM3ulqUKXsOkBVhZv2z8tUX6LulR7xkQWsYb T3Aw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=TW5GmCP1; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.36 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Return-Path: Received: from pete.vger.email (pete.vger.email. [23.128.96.36]) by mx.google.com with ESMTPS id a62-20020a639041000000b00578cc82870asi21761090pge.344.2023.09.29.19.06.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 29 Sep 2023 19:06:21 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.36 as permitted sender) client-ip=23.128.96.36; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=TW5GmCP1; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.36 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by pete.vger.email (Postfix) with ESMTP id B77358405337; Fri, 29 Sep 2023 14:06:48 -0700 (PDT) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.10 at pete.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233749AbjI2VGY (ORCPT + 99 others); Fri, 29 Sep 2023 17:06:24 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54264 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232748AbjI2VGX (ORCPT ); Fri, 29 Sep 2023 17:06:23 -0400 Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.31]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 085BC1AA; Fri, 29 Sep 2023 14:06:22 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1696021582; x=1727557582; h=date:from:to:cc:subject:message-id:references: mime-version:content-transfer-encoding:in-reply-to; bh=v9BueRZQjerm83oD7OFPRBkzsAT7x+Db9BsxRYzoMU0=; b=TW5GmCP1ddk76NM8ajsqbPqR+QYaX6Y7PxvMBKCo6pMqqG9lA6HWflVu 1IZeKyQUvkVgWOwnbLlA7Km1jukG058ZtOkXfvDThu08BFK6n0zsL1UGX NnBQW3mNmmdbSijG06p8fGpWbszZzs0x02Y2eCiiR6emaMQGUkxxJetpj qE8O78MbR22zmLgRrkBvyeiVeTMsWT7a0XeFjMk4Y8uLXDzAgzDaJlmqG REUkrKECoST+GSnUkdf2Lr4e+MhvMPIu47NCU4xPPfP8TUHSJpC/1vISs 88YxAA0dsOk6RPK1tqVZzjNaUXZGSljhX8GLlRfK4g45YrL/pnShj+NlY A==; X-IronPort-AV: E=McAfee;i="6600,9927,10848"; a="446539373" X-IronPort-AV: E=Sophos;i="6.03,188,1694761200"; d="scan'208";a="446539373" Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Sep 2023 14:06:21 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10848"; a="923694203" X-IronPort-AV: E=Sophos;i="6.03,188,1694761200"; d="scan'208";a="923694203" Received: from agluck-desk3.sc.intel.com (HELO agluck-desk3) ([172.25.222.74]) by orsmga005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Sep 2023 14:06:21 -0700 Date: Fri, 29 Sep 2023 14:06:19 -0700 From: Tony Luck To: Peter Newman Cc: Fenghua Yu , Reinette Chatre , Jonathan Corbet , Shuah Khan , x86@kernel.org, Shaopeng Tan , James Morse , Jamie Iles , Babu Moger , Randy Dunlap , linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, patches@lists.linux.dev Subject: Re: [PATCH v6 0/8] Add support for Sub-NUMA cluster (SNC) systems Message-ID: References: <20230829234426.64421-1-tony.luck@intel.com> <20230928191350.205703-1-tony.luck@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on pete.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (pete.vger.email [0.0.0.0]); Fri, 29 Sep 2023 14:06:48 -0700 (PDT) On Fri, Sep 29, 2023 at 04:33:17PM +0200, Peter Newman wrote: > Hi Tony, > > On Thu, Sep 28, 2023 at 9:14 PM Tony Luck wrote: > > > > The Sub-NUMA cluster feature on some Intel processors partitions > > the CPUs that share an L3 cache into two or more sets. This plays > > havoc with the Resource Director Technology (RDT) monitoring features. > > Prior to this patch Intel has advised that SNC and RDT are incompatible. > > > > Some of these CPU support an MSR that can partition the RMID > > counters in the same way. This allows for monitoring features > > to be used (with the caveat that memory accesses between different > > SNC NUMA nodes may still not be counted accuratlely. > > Is an "SNC NUMA node" a "sub-NUMA node", or a NUMA node on which SNC > has been enabled? It would be architecturally possible to enable SNC mode on a subset of CPU sockets. But there isn't a BIOS setup option to do that. You either have SNC everywhere, or nowhere. I prefer "SNC NUMA node" == "sub-NUMA node". This version "NUMA node on which SNC has been enabled" makes it sound like there is a control on a NUMA node that can be switched. The control is on the CPU socket. That's often equivalent to a NUMA node, but Intel has had CPUs in the past where this isn't the case (e.g. Cascade Lake -AP and Cooper Lake). > > Thanks! > -Peter Thanks for the review of the series. I've applied changes to my local tree. Will post v7 of the series early next week if no other reviews come in. -Tony