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[23.128.96.34]) by mx.google.com with ESMTPS id kl8-20020a170903074800b001bc74f6a951si25802147plb.250.2023.10.02.09.20.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 02 Oct 2023 09:20:42 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.34 as permitted sender) client-ip=23.128.96.34; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=Ozqfavxt; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.34 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by howler.vger.email (Postfix) with ESMTP id 78E278254AAD; Mon, 2 Oct 2023 07:59:03 -0700 (PDT) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.10 at howler.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237924AbjJBO7A (ORCPT + 99 others); Mon, 2 Oct 2023 10:59:00 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45360 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237923AbjJBO65 (ORCPT ); Mon, 2 Oct 2023 10:58:57 -0400 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F322B9D for ; Mon, 2 Oct 2023 07:58:54 -0700 (PDT) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 8EB8BC433C7; Mon, 2 Oct 2023 14:58:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1696258734; bh=aPElMtrm6cRnjvgAzssfrsP0JzinANpUMRWhgXxUB/M=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=Ozqfavxtalm0nQpoOCGplrCeGMuZYRp5LLJ0XRkTKgyTSSTQHbAKqZZWhFleLIpUT KWfz3NLQMpaQD3eOIWU8HYPYVmiMV5UHGnAjaLYgkGMj3Gd2D+81ZSxcgDJKDnv2K2 aypXo8nmaf4zp1lHMCKHde66SK9gUZu4qGZk0TKWtCOOAGmLXCwb95wRhVu3585CMH trJwNkpZpxLkitNP7cjcsK1brUYA1t00Lnhw064moonHpEqHQZO3vSZL4UE2dBMp1T uP7alNf2phJqCqkyjVjSsuJtl9cmQay/sIdIOv7U/e3kSK7krW3DFdDPuX0NH6ZHD0 z1+uYvV4nFqtg== Received: from sofa.misterjones.org ([185.219.108.64] helo=goblin-girl.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1qnKNo-000OrN-93; Mon, 02 Oct 2023 15:58:52 +0100 Date: Mon, 02 Oct 2023 15:58:50 +0100 Message-ID: <86sf6tnk9h.wl-maz@kernel.org> From: Marc Zyngier To: Kristina Martsenko Cc: Oliver Upton , kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org, James Morse , Suzuki K Poulose , Zenghui Yu , Catalin Marinas , Will Deacon , Vladimir Murzin , Colton Lewis , linux-kernel@vger.kernel.org Subject: Re: [PATCH v2 0/2] KVM: arm64: Support for Arm v8.8 memcpy instructions in KVM guests In-Reply-To: References: <20230922112508.1774352-1-kristina.martsenko@arm.com> <6687f58c-0da9-0583-2dc1-2089f292b745@arm.com> <87fs2xmiof.wl-maz@kernel.org> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/29.1 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: kristina.martsenko@arm.com, oliver.upton@linux.dev, kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org, james.morse@arm.com, suzuki.poulose@arm.com, yuzenghui@huawei.com, catalin.marinas@arm.com, will@kernel.org, vladimir.murzin@arm.com, coltonlewis@google.com, linux-kernel@vger.kernel.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (howler.vger.email [0.0.0.0]); Mon, 02 Oct 2023 07:59:03 -0700 (PDT) On Fri, 29 Sep 2023 15:51:32 +0100, Kristina Martsenko wrote: > > On 29/09/2023 10:29, Marc Zyngier wrote: > > On Thu, 28 Sep 2023 17:55:39 +0100, > > Kristina Martsenko wrote: > >> > >> On 27/09/2023 07:00, Oliver Upton wrote: > >>> > >>> On Fri, Sep 22, 2023 at 12:25:06PM +0100, Kristina Martsenko wrote: > >>>> Hi, > >>>> > >>>> This is v2 of the series to allow using the new Arm memory copy instructions > >>>> in KVM guests. See v1 for more information [1]. > >>> > >>> > >>> Thanks for sending out the series. I've been thinking about what the > >>> architecture says for MOPS, and I wonder if what's currently in the > >>> Arm ARM is clear enough for EL1 software to be written robustly. > >>> > >>> While HCRX_EL2.MCE2 allows the hypervisor to intervene on MOPS > >>> exceptions from EL1, there's no such control for EL0. So when vCPU > >>> migration occurs EL1 could get an unexpected MOPS exception, even for a > >>> process that was pinned to a single (virtual) CPU implementation. > >>> > >>> Additionally, the wording of I_NXHPS seems to suggest that EL2 handling > >>> of MOPS exceptions is only expected in certain circumstances where EL1 is > >>> incapable of handling an exception. Is the unwritten expectation then > >>> that EL1 software should tolerate 'unexpected' MOPS exceptions from EL1 > >>> and EL0, even if EL1 did not migrate the PE context? > >>> > >>> Perhaps I'm being pedantic, but I'd really like for there to be some > >>> documentation that suggests MOPS exceptions can happen due to context > >>> migration done by a higher EL as that is the only option in the context > >>> of virtualization. > >> > >> That's a good point. This shouldn't affect Linux guests as Linux is > >> always able to handle a MOPS exception coming from EL0. But it would > >> affect any non-Linux guest that pins all its EL0 tasks and doesn't > >> implement a handler. It's not clear to me what the expectation for > >> guests is, I'll ask the architects to clarify and get back to you. > > > > My understanding is that MCE2 should always be set if the hypervisor > > can migrate vcpus across implementations behind EL1's back, and that > > in this context, EL1 never sees such an exception. > > Notice that MCE2 only traps exceptions from EL1, not from EL0. > Exceptions from EL0 always go to EL1. Even if MCE2 is always set, EL1 > will see the exception when the hypervisor migrates the vcpu while the > vcpu is executing a MOPS instruction in EL0. Ah, good point. I stand corrected. M. -- Without deviation from the norm, progress is not possible.