Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.36 as permitted sender) client-ip=23.128.96.36;
From:   "Balas, Eliza" <Eliza.Balas@analog.com>
To:     Conor Dooley <conor@kernel.org>
CC:     Rob Herring <robh@kernel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        Conor Dooley <conor+dt@kernel.org>,
        Derek Kiernan <derek.kiernan@amd.com>,
        Dragan Cvetic <dragan.cvetic@amd.com>,
        Arnd Bergmann <arnd@arndb.de>,
        Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        "devicetree@vger.kernel.org" <devicetree@vger.kernel.org>
Subject: RE: [PATCH v2 1/2] dt-bindings: misc: adi,axi-tdd: Add device-tree
 binding for TDD engine
Thread-Topic: [PATCH v2 1/2] dt-bindings: misc: adi,axi-tdd: Add device-tree
 binding for TDD engine
Thread-Index: AQHZ8e6/zUxp0vYDHECkHhwPalTB6rA2uEYAgAABCqCAAC37AIAAA+iA
Date:   Mon, 2 Oct 2023 19:48:42 +0000
Message-ID: <BN7PR03MB4545090CC2F859333E9C3AB297C5A@BN7PR03MB4545.namprd03.prod.outlook.com>
References: <20230928092804.22612-1-eliza.balas@analog.com>
 <20230928092804.22612-2-eliza.balas@analog.com>
 <20231002163244.GA1886905-robh@kernel.org>
 <BN7PR03MB454508AF350D2DC96FE1743A97C5A@BN7PR03MB4545.namprd03.prod.outlook.com>
 <20231002-aggregate-scanner-3ca2ae69cf0c@spud>
In-Reply-To: <20231002-aggregate-scanner-3ca2ae69cf0c@spud>
Accept-Language: en-US
Content-Language: en-US
x-ms-exchange-antispam-messagedata-chunkcount: 1
x-ms-exchange-antispam-messagedata-0: =?us-ascii?Q?+j9OYit0V9FcRE3v/RgpmSHgzkkvcMX1tFe1BHtcQq9JmzSwvV8w/DibxSQc?=
 =?us-ascii?Q?VIcNaKSq4PzpciH73AIIu+qj0CkR3PMoPzzZ10tuu26XdHt4Rd9o6Ka6SFl8?=
 =?us-ascii?Q?9Cn7BB16zo9zjTEY7Fb7ZRoVoSjDI7zbX2k77xNwsJoiH0pp0rpmo6cNNswC?=
 =?us-ascii?Q?sBZwra6NF6ZvyJBfBXeHnbaxeZNEHiUSjrNyXvj+xv3v6kBYeGxBBIUv5D8x?=
 =?us-ascii?Q?K+ZiLfRiLg0BCwPO2h9AaiKZLaCWC/+UHaeJtXmHB9cnqp/tDgt5xFLWfYIt?=
 =?us-ascii?Q?g6IlgsRH8XgwG7HheroDPPZvthRv+BEifa/KjKNsV/DdEDhEO83hq7zmHUKn?=
 =?us-ascii?Q?Pqp1JiMkqwkvr0eQCqpcWMq8mwDUuBeO6Earnbjf8bo38/e73E8FOPSlBr+w?=
 =?us-ascii?Q?IpJoD6qOV4Do5GxlMBB6+5gs4XADRT4R4TVZZlkM3EaaAPIabQSlsmhOW3Ll?=
 =?us-ascii?Q?PIn9mGhooRwenmIv0qal50K1KIHqywbcnQg9V95NcuBAUY0k1Ympdu/OjY2p?=
 =?us-ascii?Q?APWGwj24KyIBJOL97kgmZkqKUMEflLCmyXWqqf66DnzNykwUMF10WlOfFd3L?=
 =?us-ascii?Q?wEZ20yrqxkbbra3ug2m4HU31pyqHvLhn3eDAPsJEFme/RjHN9CjRqhO3fDLi?=
 =?us-ascii?Q?vCJCEA0FMOkSLpWXa3aXXfqsnm2EINNUs8g0tRZ74l7rs2GtXTjeE9Rkp+9A?=
 =?us-ascii?Q?T3Tg6QA/ojYAmtDYavHxAKUMXjpwEznpwkXPRCzhF/o2P92geQNbOjd41hvH?=
 =?us-ascii?Q?RMLgQo058YvuHXlikox6nYby9Y0qI/Imyz2VvqM+OvlMNtU2Jf7fYDPKFt/E?=
 =?us-ascii?Q?+JtFn5og0GOPPdcAnXYYC12ECo7F9czI16ra4Z2iR6ImfUiAK6x7zfU1gQfD?=
 =?us-ascii?Q?l6zHeIlJTZZSQWnn4AiQpn+Jg2AKbZp4fl0pl9Ajlq1E7yi0VOFVhaxsojtL?=
 =?us-ascii?Q?kaV6ycPm1BGin54+mAdBPprkU9GrsVVqokEUGO9Aj5huMRkvVAtem36zm/WK?=
 =?us-ascii?Q?EGtTGdusxiphbq9kR4lXn3IJKFA6jgv5Kj5UFpGpdJ3i6ZuO2DrbDbmwz/0D?=
 =?us-ascii?Q?LpeRCx0lzTlo0l/udia6uQ/8sm0PFjsTaMNHdyJFajTgAsH2EiTCMQ0jqk1C?=
 =?us-ascii?Q?K71ytmtVDB7Y199GuADNhbloulQpnemMgat0gRJtjPxOcVaV0+HqZ+Ur9GTV?=
 =?us-ascii?Q?NEvYX4OWgCbD8O3zPxsBR9UUkeIoy0qWLU/10Q7YrCoripeBjZqqZC8L5sU8?=
 =?us-ascii?Q?T/cD2b+9eKwmBCCNZtkmdCAvuw/UU83ww2E3twMrR91d82jFWKtWU6+Fxsfr?=
 =?us-ascii?Q?9zAbeSTBv90f8MpjxQEwVvkCEfVZYlFxdI0mGVF5X18BN1h0HCkg5rqaHL8z?=
 =?us-ascii?Q?4XEOb4J4jYvZ2SdWhQI+m5DkkShNu/hkzGUH+1KpQARI7/UTAhBn7kYQjLzM?=
 =?us-ascii?Q?9kgs7hgNF1SDbjGxxn7qWFJ4ptZR5s5ftG8DYlQxbpjzrdj6JQWVZoXP+ZJS?=
 =?us-ascii?Q?qL+1RdHI+wOWqkDiZwO8xnbftZ8DyP8Di1oA2pMCcj0rp6pxWZghb3Ya5gf4?=
 =?us-ascii?Q?7KyKYk5haEnJKZknLQZbhrIDqW2CQ+zDbBiG8WXg?=
Content-Type: text/plain; charset="us-ascii"
Content-Transfer-Encoding: quoted-printable
MIME-Version: 1.0
X-OriginatorOrg: analog.com
X-MS-Exchange-CrossTenant-AuthAs: Internal
X-MS-Exchange-CrossTenant-AuthSource: BN7PR03MB4545.namprd03.prod.outlook.com
X-MS-Exchange-CrossTenant-Network-Message-Id: 1f8d244f-5929-4360-caba-08dbc38094e7
X-MS-Exchange-CrossTenant-originalarrivaltime: 02 Oct 2023 19:48:42.4285
 (UTC)
X-MS-Exchange-CrossTenant-fromentityheader: Hosted
X-MS-Exchange-CrossTenant-id: eaa689b4-8f87-40e0-9c6f-7228de4d754a
X-MS-Exchange-CrossTenant-mailboxtype: HOSTED
X-MS-Exchange-CrossTenant-userprincipalname: t0ASDV7OG8MSyVDbLxITx1ku9QS8O/8KxFAcf0yUTcGkZJEoQvL0LWwWBOq/AdKbNDwmvSniALFG3wtci8fF4Q==
X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH0PR03MB6724
X-Proofpoint-GUID: vPaTRbBBUfMosSbxXovyQ8VbJpFmXy3X
X-Proofpoint-ORIG-GUID: vPaTRbBBUfMosSbxXovyQ8VbJpFmXy3X
X-Proofpoint-Virus-Version: vendor=baseguard
 engine=ICAP:2.0.267,Aquarius:18.0.980,Hydra:6.0.619,FMLib:17.11.176.26
 definitions=2023-10-02_14,2023-10-02_01,2023-05-22_02
X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 mlxscore=0
 malwarescore=0 bulkscore=0 phishscore=0 clxscore=1011 adultscore=0
 suspectscore=0 mlxlogscore=999 priorityscore=1501 spamscore=0
 impostorscore=0 classifier=spam adjust=0 reason=mlx scancount=1
 engine=8.19.0-2309180000 definitions=main-2310020153
X-Spam-Status: No, score=-0.8 required=5.0 tests=DKIM_SIGNED,DKIM_VALID,
	HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE,
	SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6
X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on pete.vger.email
Precedence: bulk
List-ID: <linux-kernel.vger.kernel.org>
X-Mailing-List: linux-kernel@vger.kernel.org
X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (pete.vger.email [0.0.0.0]); Mon, 02 Oct 2023 12:49:16 -0700 (PDT)

> -----Original Message-----
> From: Conor Dooley <conor@kernel.org>
> Sent: Monday, October 2, 2023 22:21
> To: Balas, Eliza <Eliza.Balas@analog.com>
> Cc: Rob Herring <robh@kernel.org>; Krzysztof Kozlowski <krzysztof.kozlows=
ki+dt@linaro.org>; Conor Dooley <conor+dt@kernel.org>;
> Derek Kiernan <derek.kiernan@amd.com>; Dragan Cvetic <dragan.cvetic@amd.c=
om>; Arnd Bergmann <arnd@arndb.de>; Greg
> Kroah-Hartman <gregkh@linuxfoundation.org>; linux-kernel@vger.kernel.org;=
 devicetree@vger.kernel.org
> Subject: Re: [PATCH v2 1/2] dt-bindings: misc: adi,axi-tdd: Add device-tr=
ee binding for TDD engine
>=20
> [External]
>=20
> On Mon, Oct 02, 2023 at 04:46:26PM +0000, Balas, Eliza wrote:
> > > -----Original Message-----
> > > From: Rob Herring <robh@kernel.org>
> > > Sent: Monday, October 2, 2023 19:33
> > > To: Balas, Eliza <Eliza.Balas@analog.com>
> > > Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>; Conor Do=
oley <conor+dt@kernel.org>; Derek Kiernan
> > > <derek.kiernan@amd.com>; Dragan Cvetic <dragan.cvetic@amd.com>; Arnd =
Bergmann <arnd@arndb.de>; Greg Kroah-Hartman
> > > <gregkh@linuxfoundation.org>; linux-kernel@vger.kernel.org; devicetre=
e@vger.kernel.org
> > > Subject: Re: [PATCH v2 1/2] dt-bindings: misc: adi,axi-tdd: Add devic=
e-tree binding for TDD engine
> > >
> > > [External]
> > >
> > > On Thu, Sep 28, 2023 at 12:28:03PM +0300, Eliza Balas wrote:
> > > > Add device tree documentation for the AXI TDD Core.
> > > > The generic TDD controller is in essence a waveform generator
> > > > capable of addressing RF applications which require Time Division
> > > > Duplexing, as well as controlling other modules of general
> > > > applications through its dedicated 32 channel outputs.
> > > >
> > > > The reason of creating the generic TDD controller was to reduce
> > > > the naming confusion around the existing repurposed TDD core
> > > > built for AD9361, as well as expanding its number of output
> > > > channels for systems which require more than six controlling signal=
s.
> > > >
> > > > Signed-off-by: Eliza Balas <eliza.balas@analog.com>
> > > > ---
> > > >  .../devicetree/bindings/misc/adi,axi-tdd.yaml | 65 +++++++++++++++=
++++
> > > >  MAINTAINERS                                   |  7 ++
> > > >  2 files changed, 72 insertions(+)
> > > >  create mode 100644 Documentation/devicetree/bindings/misc/adi,axi-=
tdd.yaml
> > > >
> > > > diff --git a/Documentation/devicetree/bindings/misc/adi,axi-tdd.yam=
l b/Documentation/devicetree/bindings/misc/adi,axi-
> tdd.yaml
> > > > new file mode 100644
> > > > index 000000000000..8938da801b95
> > > > --- /dev/null
> > > > +++ b/Documentation/devicetree/bindings/misc/adi,axi-tdd.yaml
> > > > @@ -0,0 +1,65 @@
> > > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > > > +# Copyright 2023 Analog Devices Inc.
> > > > +%YAML 1.2
> > > > +---
> > > > +$id: https://urldefense.com/v3/__http://devicetree.org/schemas/mis=
c/adi,axi-
> > > tdd.yaml*__;Iw!!A3Ni8CS0y2Y!5Cxus2huppjhkiJZLWTpJEgA0IXdLZx4t0fS9J1yt=
0xgjp9g3Y1N5PbZ7pAcIkKU4WPbS_TR9yjTKw$
> > > > +$schema: https://urldefense.com/v3/__http://devicetree.org/meta-
> > >
> schemas/core.yaml*__;Iw!!A3Ni8CS0y2Y!5Cxus2huppjhkiJZLWTpJEgA0IXdLZx4t0fS=
9J1yt0xgjp9g3Y1N5PbZ7pAcIkKU4WPbS_RK8aQ9xw$
> > > > +
> > > > +title: Analog Devices AXI TDD Core
> > > > +
> > > > +maintainers:
> > > > +  - Eliza Balas <eliza.balas@analog.com>
> > > > +
> > > > +description: |
> > > > +  The TDD controller is a waveform generator capable of addressing=
 RF
> > > > +  applications which require Time Division Duplexing, as well as c=
ontrolling
> > > > +  other modules of general applications through its dedicated 32 c=
hannel
> > > > +  outputs. It solves the synchronization issue when transmitting a=
nd receiving
> > > > +  multiple frames of data through multiple buffers.
> > > > +  The TDD IP core is part of the Analog Devices hdl reference desi=
gns and has
> > > > +  the following features:
> > > > +    * Up to 32 independent output channels
> > > > +    * Start/stop time values per channel
> > > > +    * Enable and polarity bit values per channel
> > > > +    * 32 bit-max internal reference counter
> > > > +    * Initial startup delay before waveform generation
> > > > +    * Configurable frame length and number of frames per burst
> > > > +    * 3 sources of synchronization: external, internal and softwar=
e generated
> > > > +  For more information see the wiki:
> > > > +  https://wiki.analog.com/resources/fpga/docs/axi_tdd
> > > > +
> > > > +properties:
> > > > +  compatible:
> > > > +    enum:
> > > > +      - adi,axi-tdd-2.00.a
> > >
> > > Where does this version number come from? I looked at the above link =
and
> > > see versions such as '2021_R2', '2019_r2', etc. I didn't dig deeper
> > > whether there's some per IP version.
> > >
> > > If you want to use version numbers, please document the versioning
> > > scheme. For example, see
> > > Documentation/devicetree/bindings/sifive/sifive-blocks-ip-versioning.=
txt.
> > >
> > > Rob
> >
> > The version refers to the IP version. The version of the IP is also
> > specified in its VERSION register (there is a drop down to expand the
> > register map on the wiki page) which is verified by the driver during
> > probe. "2021_R2" refers to the compatible tool version used for
> > creating the FPGAIP Core.
>=20
> If you have version registers in these IPs, what benefit does version
> numbers in the compatible string bring?
> Rather than using the version numbers to validate what the DT gave you,
> which not the kernel's job IMO, why not just use the information from
> the register to determine the version?
>=20
> Cheers,
> Conor.

As the description of this patch says, we want to resolve the naming confus=
ion around the existing repurposed TDD core (https://wiki.analog.com/resour=
ces/eval/user-guides/ad-pzsdr2400tdd-eb/reference_hdl#tdd_controller)
built for AD9361 and this TDD Engine IP core (https://wiki.analog.com/resou=
rces/fpga/docs/axi_tdd) which is a similar core, with more output channels =
and some extra features. The version numbers in the compatible string are u=
sed to differentiate between the two IPs.

Best regards,
Eliza