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From:   Nava kishore Manne <nava.kishore.manne@amd.com>
To:     <mdf@kernel.org>, <hao.wu@intel.com>, <yilun.xu@intel.com>,
        <trix@redhat.com>, <linux-fpga@vger.kernel.org>,
        <linux-kernel@vger.kernel.org>
CC:     Radhey Shyam Pandey <radhey.shyam.pandey@amd.com>
Subject: [PATCH] fpga: versal: Add support for 44-bit DMA operations
Date:   Tue, 3 Oct 2023 12:44:09 +0530
Message-ID: <20231003071409.4165149-1-nava.kishore.manne@amd.com>
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The existing implementation support only 32-bit DMA operation.
So, it fails to load the bitstream for the high DDR designs(Beyond 4GB).
To fix this issue update the DMA mask handling logic to support 44-bit
DMA operations.

Signed-off-by: Nava kishore Manne <nava.kishore.manne@amd.com>
Reviewed-by: Radhey Shyam Pandey <radhey.shyam.pandey@amd.com>
---
 drivers/fpga/versal-fpga.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/fpga/versal-fpga.c b/drivers/fpga/versal-fpga.c
index e1601b3a345b..3710e8f01be2 100644
--- a/drivers/fpga/versal-fpga.c
+++ b/drivers/fpga/versal-fpga.c
@@ -48,7 +48,7 @@ static int versal_fpga_probe(struct platform_device *pdev)
 	struct fpga_manager *mgr;
 	int ret;
 
-	ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
+	ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(44));
 	if (ret < 0) {
 		dev_err(dev, "no usable DMA configuration\n");
 		return ret;
-- 
2.25.1