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[209.85.128.169]) by smtp.gmail.com with ESMTPSA id t1-20020a252d01000000b00d7e339ada01sm460433ybt.20.2023.10.03.08.19.27 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 03 Oct 2023 08:19:27 -0700 (PDT) Received: by mail-yw1-f169.google.com with SMTP id 00721157ae682-59c268676a9so12899207b3.0; Tue, 03 Oct 2023 08:19:27 -0700 (PDT) X-Received: by 2002:a25:553:0:b0:d36:58a6:3281 with SMTP id 80-20020a250553000000b00d3658a63281mr11873855ybf.39.1696346367086; Tue, 03 Oct 2023 08:19:27 -0700 (PDT) MIME-Version: 1.0 References: <20230929053915.1530607-1-claudiu.beznea@bp.renesas.com> <20230929053915.1530607-5-claudiu.beznea@bp.renesas.com> In-Reply-To: <20230929053915.1530607-5-claudiu.beznea@bp.renesas.com> From: Geert Uytterhoeven Date: Tue, 3 Oct 2023 17:19:15 +0200 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v2 04/28] clk: renesas: rzg2l: trust value returned by hardware To: Claudiu Cc: mturquette@baylibre.com, sboyd@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, linus.walleij@linaro.org, gregkh@linuxfoundation.org, jirislaby@kernel.org, magnus.damm@gmail.com, catalin.marinas@arm.com, will@kernel.org, quic_bjorande@quicinc.com, konrad.dybcio@linaro.org, arnd@arndb.de, neil.armstrong@linaro.org, prabhakar.mahadev-lad.rj@bp.renesas.com, biju.das.jz@bp.renesas.com, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, linux-serial@vger.kernel.org, linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8BIT X-Spam-Status: No, score=-2.0 required=5.0 tests=BAYES_00, FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM,HEADER_FROM_DIFFERENT_DOMAINS, RCVD_IN_DNSWL_BLOCKED,RCVD_IN_MSPIKE_H2,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (howler.vger.email [0.0.0.0]); Tue, 03 Oct 2023 08:19:34 -0700 (PDT) On Fri, Sep 29, 2023 at 7:39 AM Claudiu wrote: > From: Claudiu Beznea > > Initial value of CPG_PL2SDHI_DSEL bits 0..1 or 4..6 is 01b. Hardware user's > manual (r01uh0914ej0130-rzg2l-rzg2lc.pdf) specifies that setting 0 is > prohibited. The rzg2l_cpg_sd_clk_mux_get_parent() should just read > CPG_PL2SDHI_DSEL, trust the value and return the proper clock parent index > based on the read value. Do this. > > Fixes: eaff33646f4cb ("clk: renesas: rzg2l: Add SDHI clk mux support") > Signed-off-by: Claudiu Beznea > --- > > Changes in v2: > - Used "return val ? val - 1 : 0;" Reviewed-by: Geert Uytterhoeven i.e. will queue in renesas-clk-for-v6.7. Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds