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[23.128.96.36]) by mx.google.com with ESMTPS id cq14-20020a056a00330e00b0068a3cb58334si1851096pfb.320.2023.10.03.10.43.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 03 Oct 2023 10:43:06 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.36 as permitted sender) client-ip=23.128.96.36; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b="M8z/PNZb"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.36 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by pete.vger.email (Postfix) with ESMTP id 251138158303; Tue, 3 Oct 2023 10:43:03 -0700 (PDT) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.10 at pete.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231845AbjJCRm4 (ORCPT + 99 others); Tue, 3 Oct 2023 13:42:56 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39164 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231782AbjJCRm4 (ORCPT ); Tue, 3 Oct 2023 13:42:56 -0400 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 962C6AB; Tue, 3 Oct 2023 10:42:52 -0700 (PDT) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 441DCC433C7; Tue, 3 Oct 2023 17:42:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1696354972; bh=sr31N4h3bq02A/ddKJ/WDzDhSutvV5w7GfrIuqiakpI=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=M8z/PNZbksvHrABXDOZg64hkD56vVavPYEouOcdhLLy/telDwVu4pXPBuCth5vR+F WwJJJkSmXYXh+UwSjtSJPogexkZFSDOCWxjXOMHw8PieAakXbS94fDbBrc7wV8JzUA +MP/vxx8BlBf1jYeLKt0iUWP1PVKFdqhFbCJul1SzdESHga31kwDG5EY98VX2PHc4q 2puaKf4eXJncUKYPej2a8jsBW9uQ0GLVkOSq21wHgXHnx7jYE9fpFHSDzIlAD0nYwu rd4B8WQcNOLdwnaY0VwHhU0X5xsuYm7BeJDBypARXd0u86W8GJEzPgofJAQ0ssHYru AIqaSck7LuQUQ== Date: Tue, 3 Oct 2023 19:42:46 +0200 From: Andi Shyti To: Alain Volmat Cc: Pierre-Yves MORDRET , Maxime Coquelin , Alexandre Torgue , M'boumba Cedric Madianga , Wolfram Sang , Pierre-Yves MORDRET , linux-i2c@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH] i2c: stm32f7: Fix PEC handling in case of SMBUS transfers Message-ID: <20231003174246.vdazyls3c7kykd63@zenone.zhora.eu> References: <20231002084211.1108940-1-alain.volmat@foss.st.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20231002084211.1108940-1-alain.volmat@foss.st.com> X-Spam-Status: No, score=-1.2 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on pete.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (pete.vger.email [0.0.0.0]); Tue, 03 Oct 2023 10:43:03 -0700 (PDT) Hi Alain, On Mon, Oct 02, 2023 at 10:42:10AM +0200, Alain Volmat wrote: > The PECBYTE bit allows to generate (in case of write) or > compute/compare the PEC byte (in case of read). In case > of reading a value (performed by first sending a write > command, then followed by a read command) the PECBYTE should > only be set before starting the read command and not before > the first write command. What is this patch fixing? Can you please point this detail in the documentation, I haven't found it[*] > Fixes: 9e48155f6bfe ("i2c: i2c-stm32f7: Add initial SMBus protocols support") > > Signed-off-by: Alain Volmat please, don't leave blank lines between tags. Thanks, Andi [*] Hope this is the correct one: https://www.st.com/resource/en/reference_manual/rm0385-stm32f75xxx-and-stm32f74xxx-advanced-armbased-32bit-mcus-stmicroelectronics.pdf > --- > drivers/i2c/busses/i2c-stm32f7.c | 9 ++++++--- > 1 file changed, 6 insertions(+), 3 deletions(-) > > diff --git a/drivers/i2c/busses/i2c-stm32f7.c b/drivers/i2c/busses/i2c-stm32f7.c > index 579b30581725..0d3c9a041b56 100644 > --- a/drivers/i2c/busses/i2c-stm32f7.c > +++ b/drivers/i2c/busses/i2c-stm32f7.c > @@ -1059,9 +1059,10 @@ static int stm32f7_i2c_smbus_xfer_msg(struct stm32f7_i2c_dev *i2c_dev, > /* Configure PEC */ > if ((flags & I2C_CLIENT_PEC) && f7_msg->size != I2C_SMBUS_QUICK) { > cr1 |= STM32F7_I2C_CR1_PECEN; > - cr2 |= STM32F7_I2C_CR2_PECBYTE; > - if (!f7_msg->read_write) > + if (!f7_msg->read_write) { > + cr2 |= STM32F7_I2C_CR2_PECBYTE; > f7_msg->count++; > + } > } else { > cr1 &= ~STM32F7_I2C_CR1_PECEN; > cr2 &= ~STM32F7_I2C_CR2_PECBYTE; > @@ -1149,8 +1150,10 @@ static void stm32f7_i2c_smbus_rep_start(struct stm32f7_i2c_dev *i2c_dev) > f7_msg->stop = true; > > /* Add one byte for PEC if needed */ > - if (cr1 & STM32F7_I2C_CR1_PECEN) > + if (cr1 & STM32F7_I2C_CR1_PECEN) { > + cr2 |= STM32F7_I2C_CR2_PECBYTE; > f7_msg->count++; > + } > > /* Set number of bytes to be transferred */ > cr2 &= ~(STM32F7_I2C_CR2_NBYTES_MASK); > -- > 2.25.1 >