Received: by 2002:a05:7412:3784:b0:e2:908c:2ebd with SMTP id jk4csp2509764rdb; Wed, 4 Oct 2023 03:37:59 -0700 (PDT) X-Google-Smtp-Source: AGHT+IHRyaCiF3Eo02q84coaZP6M73eUsoGhS0G94oLL5q94+kyik+581sY/ZtgKgAcFlSxt9kJy X-Received: by 2002:a05:6808:1998:b0:3a7:36f9:51aa with SMTP id bj24-20020a056808199800b003a736f951aamr2385733oib.17.1696415878887; Wed, 04 Oct 2023 03:37:58 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1696415878; cv=none; d=google.com; s=arc-20160816; b=rMJatHzWgkR+xKRkMEUkB1Oue9GrvJtmr+mUiAA+Lel/UemzZCwMmbtWOIAGudIEuR GExTfx1ezCnL9j+kxKYvZXRaPYz+4hD56Fco7M0ok2HlHabpRlUyDMkhzGx9Rw5VVamc Y9BykLlGCkFPOSkSiO6dUpo0t1auUvymr4yqjsozHkRo4ZH0X8mmaOTjED6fQUmJcYmP 4gFnCRRKXIwxOhMeuEr0JIgBek6hLkJYmKUhkRXs5hIZ5UOACNKCq/c9ogjCDBQ5AzVQ lSHWQ9Wi13s/3HqSBvcWM6nc7P3dO861E+P8jkavl2ynxrwnVYBHaGAHBQQKQfwJtnhz MAJA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=bgESotg1ucUNSxBe+XGbEGaW9PYWluU0WM6A0IsNEdg=; fh=ErwLDw9+98Mb4Q3i5RoHr7UOS7Ns3CK5YbB+qheGbUs=; b=I9wu+OpdG7QUcNEOJxKHlqKss/Xkp25DoQeFpUEsLXnzyJQHLMLqtWuY1nfjzc+Djx zJ+fuD2oJIf/FXWmn4fnNLBLdrR+33u/Zjj6H8/Wo7viWno3CG9J5lrDPbym7jW46mHw dampU+uPZTOze4qs+ERn2cT8yyTrfbfMU8Fj3tlzfntgrTkUC46F3zY1xdxD4Zw6/Qxr T4U4aGrT6gmN1Ayn9RtbPsfUqUSUKmKIqHGLuNZ/XV87s1zFfXtXmj8ZaxCNjLc9yinU W45IAAOY3yedxKNHBj9t068nde32ZZh0PNCrf4tel7c8dMxjexR/jmkgcU8ulnmgPugM VjXg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@foss.st.com header.s=selector1 header.b=DhTkSwk6; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:7 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=foss.st.com Return-Path: Received: from snail.vger.email (snail.vger.email. [2620:137:e000::3:7]) by mx.google.com with ESMTPS id q140-20020a632a92000000b0054402b987f8si3287290pgq.605.2023.10.04.03.37.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 04 Oct 2023 03:37:58 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:7 as permitted sender) client-ip=2620:137:e000::3:7; Authentication-Results: mx.google.com; dkim=pass header.i=@foss.st.com header.s=selector1 header.b=DhTkSwk6; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:7 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=foss.st.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by snail.vger.email (Postfix) with ESMTP id EB9E28029222; Wed, 4 Oct 2023 03:37:57 -0700 (PDT) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.10 at snail.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233073AbjJDKh5 (ORCPT + 99 others); Wed, 4 Oct 2023 06:37:57 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35618 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232713AbjJDKh5 (ORCPT ); Wed, 4 Oct 2023 06:37:57 -0400 Received: from mx08-00178001.pphosted.com (mx08-00178001.pphosted.com [91.207.212.93]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 39A5DAC; Wed, 4 Oct 2023 03:37:53 -0700 (PDT) Received: from pps.filterd (m0369457.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.17.1.22/8.17.1.22) with ESMTP id 394A3871022388; Wed, 4 Oct 2023 12:37:32 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding:content-type; s= selector1; bh=bgESotg1ucUNSxBe+XGbEGaW9PYWluU0WM6A0IsNEdg=; b=Dh TkSwk68XxCzi7PobhB0rUzKN57p+5wFuuVF0eGrzAl9O2MONGD6dZYCoYDs5wHg0 g02IODDZYqmmzIMwzdD/LUdYcd1Rx5S00w/1i2kUXnSbYpCNAXOc2GlBmbdZ3HLm ctRH8+ZVrSTB9jIY7eqtNFAbxmK524hwCTSXg5mjjrUWlVTMjqVg/wFqOZqLnN4C W29G6ar14K9YQ36dHyE+pxSWg6/WUXDg5R7NXWmKqDv24dC84CKjjLo/b5C7W0zZ Q3WHXdFqo9vnDxAVSYVOLryRCZJp69/bno1rSMpu9UHRGq95BeUmGOLBuHm6NaXR Y29qCeTOVd8y6uLy5+wg== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 3texmj69fk-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 04 Oct 2023 12:37:32 +0200 (MEST) Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id AC88B10005C; Wed, 4 Oct 2023 12:37:31 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node1.st.com [10.75.129.69]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id A12E2231510; Wed, 4 Oct 2023 12:37:31 +0200 (CEST) Received: from localhost (10.201.20.120) by SHFDAG1NODE1.st.com (10.75.129.69) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.27; Wed, 4 Oct 2023 12:37:31 +0200 From: Hugues Fruchet To: Ezequiel Garcia , Philipp Zabel , Andrzej Pietrasiewicz , Nicolas Dufresne , Sakari Ailus , Benjamin Gaignard , Laurent Pinchart , Daniel Almeida , Benjamin Mugnier , Heiko Stuebner , Mauro Carvalho Chehab , Hans Verkuil , , Maxime Coquelin , Alexandre Torgue , , Rob Herring , Krzysztof Kozlowski , Conor Dooley , , , , CC: Hugues Fruchet , Marco Felsch , Adam Ford Subject: [RFC 4/6] media: hantro: add VP8 encode support for STM32MP25 VENC Date: Wed, 4 Oct 2023 12:37:18 +0200 Message-ID: <20231004103720.3540436-5-hugues.fruchet@foss.st.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231004103720.3540436-1-hugues.fruchet@foss.st.com> References: <20231004103720.3540436-1-hugues.fruchet@foss.st.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.201.20.120] X-ClientProxiedBy: SHFCAS1NODE1.st.com (10.75.129.72) To SHFDAG1NODE1.st.com (10.75.129.69) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.267,Aquarius:18.0.980,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-10-04_02,2023-10-02_01,2023-05-22_02 X-Spam-Status: No, score=-2.7 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,RCVD_IN_DNSWL_LOW,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (snail.vger.email [0.0.0.0]); Wed, 04 Oct 2023 03:37:58 -0700 (PDT) Add VP8 stateless support for STM32MP25 VENC video hardware encoder. Signed-off-by: Hugues Fruchet --- .../platform/verisilicon/stm32mp25_venc_hw.c | 22 ++++++++++++++++++- 1 file changed, 21 insertions(+), 1 deletion(-) diff --git a/drivers/media/platform/verisilicon/stm32mp25_venc_hw.c b/drivers/media/platform/verisilicon/stm32mp25_venc_hw.c index 0aac33afcadc..2176eccd1f79 100644 --- a/drivers/media/platform/verisilicon/stm32mp25_venc_hw.c +++ b/drivers/media/platform/verisilicon/stm32mp25_venc_hw.c @@ -87,6 +87,19 @@ static const struct hantro_fmt stm32mp25_venc_fmts[] = { .step_height = MB_DIM, }, }, + { + .fourcc = V4L2_PIX_FMT_VP8_FRAME, + .codec_mode = HANTRO_MODE_VP8_ENC, + .max_depth = 2, + .frmsize = { + .min_width = 96, + .max_width = 4080, + .step_width = MB_DIM, + .min_height = 96, + .max_height = 4080, + .step_height = MB_DIM, + }, + }, }; static irqreturn_t stm32mp25_venc_irq(int irq, void *dev_id) @@ -120,6 +133,13 @@ static const struct hantro_codec_ops stm32mp25_venc_codec_ops[] = { .reset = stm32mp25_venc_reset, .done = hantro_h1_jpeg_enc_done, }, + [HANTRO_MODE_VP8_ENC] = { + .run = hantro_h1_vp8_enc_run, + .reset = stm32mp25_venc_reset, + .init = hantro_vp8_enc_init, + .done = hantro_h1_vp8_enc_done, + .exit = hantro_vp8_enc_exit, + }, }; /* @@ -137,7 +157,7 @@ static const char * const stm32mp25_venc_clk_names[] = { const struct hantro_variant stm32mp25_venc_variant = { .enc_fmts = stm32mp25_venc_fmts, .num_enc_fmts = ARRAY_SIZE(stm32mp25_venc_fmts), - .codec = HANTRO_JPEG_ENCODER, + .codec = HANTRO_JPEG_ENCODER | HANTRO_VP8_ENCODER, .codec_ops = stm32mp25_venc_codec_ops, .irqs = stm32mp25_venc_irqs, .num_irqs = ARRAY_SIZE(stm32mp25_venc_irqs), -- 2.25.1