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Date:   Wed, 4 Oct 2023 22:27:09 +0800
User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH v4 01/10] riscv: Add SOPHGO SOC family Kconfig support
To:     aou@eecs.berkeley.edu, chao.wei@sophgo.com, conor@kernel.org,
        devicetree@vger.kernel.org, guoren@kernel.org, jszhang@kernel.org,
        krzysztof.kozlowski+dt@linaro.org, linux-kernel@vger.kernel.org,
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        paul.walmsley@sifive.com, robh+dt@kernel.org,
        xiaoguang.xing@sophgo.com, apatel@ventanamicro.com
Cc:     Conor Dooley <conor.dooley@microchip.com>
References: <cover.1696426805.git.unicorn_wang@outlook.com>
 <MA0P287MB0332F61F4FF161D1BCC2E659FECBA@MA0P287MB0332.INDP287.PROD.OUTLOOK.COM>
From:   Chen Wang <unicorn_wang@outlook.com>
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Sorry, please ignore this email due to not sending out in thread.

On 2023/10/4 22:20, Chen Wang wrote:
> The first SoC in the SOPHGO series is SG2042, which contains 64 RISC-V
> cores.
>
> Reviewed-by: Guo Ren <guoren@kernel.org>
> Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
> Acked-by: Chao Wei <chao.wei@sophgo.com>
> Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
> ---
>   arch/riscv/Kconfig.socs | 5 +++++
>   1 file changed, 5 insertions(+)
>
> diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
> index 6833d01e2e70..d4df7b5d0f16 100644
> --- a/arch/riscv/Kconfig.socs
> +++ b/arch/riscv/Kconfig.socs
> @@ -22,6 +22,11 @@ config SOC_SIFIVE
>   	help
>   	  This enables support for SiFive SoC platform hardware.
>   
> +config ARCH_SOPHGO
> +	bool "Sophgo SoCs"
> +	help
> +	  This enables support for Sophgo SoC platform hardware.
> +
>   config ARCH_STARFIVE
>   	def_bool SOC_STARFIVE
>