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[209.85.208.46]) by smtp.gmail.com with ESMTPSA id s17-20020a170906c31100b009adc77fe164sm3290136ejz.66.2023.10.04.12.42.37 for (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 04 Oct 2023 12:42:37 -0700 (PDT) Received: by mail-ed1-f46.google.com with SMTP id 4fb4d7f45d1cf-538e8eca9c1so240465a12.3 for ; Wed, 04 Oct 2023 12:42:37 -0700 (PDT) X-Received: by 2002:a05:6402:12c3:b0:533:310b:a8aa with SMTP id k3-20020a05640212c300b00533310ba8aamr3142717edx.13.1696448557137; Wed, 04 Oct 2023 12:42:37 -0700 (PDT) MIME-Version: 1.0 References: <20231004192404.31733-1-ubizjak@gmail.com> In-Reply-To: <20231004192404.31733-1-ubizjak@gmail.com> From: Linus Torvalds Date: Wed, 4 Oct 2023 12:42:19 -0700 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v2 4/4] x86/percpu: Use C for percpu read/write accessors To: Uros Bizjak Cc: x86@kernel.org, linux-kernel@vger.kernel.org, Andy Lutomirski , Ingo Molnar , Nadav Amit , Brian Gerst , Denys Vlasenko , "H . Peter Anvin" , Peter Zijlstra , Thomas Gleixner , Borislav Petkov , Josh Poimboeuf Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=2.7 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, RCVD_IN_SBL_CSS,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on groat.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (groat.vger.email [0.0.0.0]); Wed, 04 Oct 2023 12:42:56 -0700 (PDT) X-Spam-Level: ** Unrelated reaction.. On Wed, 4 Oct 2023 at 12:24, Uros Bizjak wrote: > > the code improves from: > > 65 8b 05 00 00 00 00 mov %gs:0x0(%rip),%eax > a9 00 00 0f 00 test $0xf0000,%eax > > to: > > 65 f7 05 00 00 00 00 testl $0xf0000,%gs:0x0(%rip) > 00 00 0f 00 Funky. Why does gcc generate that full-width load from memory, and not demote it to a byte test? IOW, it should not be 65 f7 05 00 00 00 00 testl $0xf0000,%gs:0x0(%rip) 00 00 0f 00 after optimizing it, it should be three bytes shorter at 65 f6 05 00 00 00 00 testb $0xf,%gs:0x0(%rip) 0f instead (this is "objdump", so it doesn't show that the relocation entry has changed by +2 to compensate). Now, doing the access narrowing is a bad idea for stores (because it can cause subsequent loads to have conflicts in the store buffer), but for loads it should always be a win to narrow the access. I wonder why gcc doesn't do it. This is not related to __seg_gs - I tried it with regular memory accesses too, and gcc kept those as 32-bit accesses too. And no, the assembler can't optimize that operation either, since I think changing the testl to a testb would change the 'P' bit in the resulting eflags, so this is a "the compiler could pick a better instruction choice" thing. I'm probably missing some reason why gcc wouldn't do this. But clang does seem to do this obvious optimization. Linus