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[23.128.96.34]) by mx.google.com with ESMTPS id 20-20020a631654000000b00578b6e2f462si343924pgw.351.2023.10.04.18.12.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 04 Oct 2023 18:12:45 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.34 as permitted sender) client-ip=23.128.96.34; Authentication-Results: mx.google.com; dkim=pass header.i=@codeconstruct.com.au header.s=2022a header.b=eoIzp3TL; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.34 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=codeconstruct.com.au Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by howler.vger.email (Postfix) with ESMTP id AF1BA853A0F7; Wed, 4 Oct 2023 18:12:34 -0700 (PDT) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.10 at howler.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244152AbjJEBMd (ORCPT + 99 others); Wed, 4 Oct 2023 21:12:33 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58520 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241050AbjJEBMd (ORCPT ); Wed, 4 Oct 2023 21:12:33 -0400 Received: from codeconstruct.com.au (pi.codeconstruct.com.au [203.29.241.158]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BC7F8E4; Wed, 4 Oct 2023 18:12:23 -0700 (PDT) Received: from [192.168.68.112] (ppp118-210-84-62.adl-adc-lon-bras32.tpg.internode.on.net [118.210.84.62]) by mail.codeconstruct.com.au (Postfix) with ESMTPSA id 22EBF200DB; Thu, 5 Oct 2023 09:12:13 +0800 (AWST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=codeconstruct.com.au; s=2022a; t=1696468337; bh=xAxBkEJVdrWYBdGjmgEXDdPp5zXscmuH8qacPOd7/ek=; h=Subject:From:To:Cc:Date:In-Reply-To:References; b=eoIzp3TLvlOLS2As2yWm6Y+lulUfPoFLMN47c8hyhA4en1MViwWxFtCxFb5CLJz+e ufeii4Unrj8ebwvcJ2VWtid0g87OtRmQTf4H26qSsbsd3QnDCSj0zWHiRJyCe6fOZr 6sSsZtCjxR2ZctKxXpzuhGMdD2uL5x7Zr3Pr2Y/rmU7w0cllCW7X+JaQyspLJ15L2+ diC9oBgd1ko/KUlqQIFpkDoYOxR4KmxscrR1sN82SL6TJua+G7QAl6w5d9wE8Ja294 O6LfaLRSBm/8j/N4fx894/+5i2/yNSqL1W1EpbkdP50GL8nOFRme+uiW5lg3BIMQNk yYUeJkyzZgt1A== Message-ID: Subject: Re: [PATCH] gpio: aspeed: fix the GPIO number passed to pinctrl_gpio_set_config() From: Andrew Jeffery To: Bartosz Golaszewski , Linus Walleij , Andy Shevchenko , Joel Stanley , Andrew Jeffery Cc: linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org, linux-kernel@vger.kernel.org, Bartosz Golaszewski Date: Thu, 05 Oct 2023 11:42:12 +1030 In-Reply-To: <20231003073926.10771-1-brgl@bgdev.pl> References: <20231003073926.10771-1-brgl@bgdev.pl> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.46.4-2 MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_PASS,SPF_PASS, URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (howler.vger.email [0.0.0.0]); Wed, 04 Oct 2023 18:12:34 -0700 (PDT) On Tue, 2023-10-03 at 09:39 +0200, Bartosz Golaszewski wrote: > From: Bartosz Golaszewski >=20 > pinctrl_gpio_set_config() expects the GPIO number from the global GPIO > numberspace, not the controller-relative offset, which needs to be added > to the chip base. >=20 > Fixes: 5ae4cb94b313 ("gpio: aspeed: Add debounce support") > Signed-off-by: Bartosz Golaszewski Reviewed-by: Andrew Jeffery Thanks! > --- > drivers/gpio/gpio-aspeed.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) >=20 > diff --git a/drivers/gpio/gpio-aspeed.c b/drivers/gpio/gpio-aspeed.c > index da33bbbdacb9..58f107194fda 100644 > --- a/drivers/gpio/gpio-aspeed.c > +++ b/drivers/gpio/gpio-aspeed.c > @@ -973,7 +973,7 @@ static int aspeed_gpio_set_config(struct gpio_chip *c= hip, unsigned int offset, > else if (param =3D=3D PIN_CONFIG_BIAS_DISABLE || > param =3D=3D PIN_CONFIG_BIAS_PULL_DOWN || > param =3D=3D PIN_CONFIG_DRIVE_STRENGTH) > - return pinctrl_gpio_set_config(offset, config); > + return pinctrl_gpio_set_config(chip->base + offset, config); > else if (param =3D=3D PIN_CONFIG_DRIVE_OPEN_DRAIN || > param =3D=3D PIN_CONFIG_DRIVE_OPEN_SOURCE) > /* Return -ENOTSUPP to trigger emulation, as per datasheet */