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From:   "Pucha, HimasekharX Reddy" <himasekharx.reddy.pucha@intel.com>
To:     ivecera <ivecera@redhat.com>,
        "netdev@vger.kernel.org" <netdev@vger.kernel.org>
CC:     "edumazet@google.com" <edumazet@google.com>,
        "intel-wired-lan@lists.osuosl.org" <intel-wired-lan@lists.osuosl.org>,
        "Brandeburg, Jesse" <jesse.brandeburg@intel.com>,
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        "pabeni@redhat.com" <pabeni@redhat.com>,
        "davem@davemloft.net" <davem@davemloft.net>
Subject: RE: [Intel-wired-lan] [PATCH net-next v2 3/9] i40e: Refactor
 I40E_MDIO_CLAUSE* macros
Thread-Topic: [Intel-wired-lan] [PATCH net-next v2 3/9] i40e: Refactor
 I40E_MDIO_CLAUSE* macros
Thread-Index: AQHZ8R1E+O3hpnUgAEaJ4/X27YCwK7A65NjA
Date:   Thu, 5 Oct 2023 08:12:46 +0000
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References: <20230927083135.3237206-1-ivecera@redhat.com>
 <20230927083135.3237206-4-ivecera@redhat.com>
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> -----Original Message-----
> From: Intel-wired-lan <intel-wired-lan-bounces@osuosl.org> On Behalf Of I=
van Vecera
> Sent: Wednesday, September 27, 2023 2:01 PM
> To: netdev@vger.kernel.org
> Cc: edumazet@google.com; intel-wired-lan@lists.osuosl.org; Brandeburg, Je=
sse <jesse.brandeburg@intel.com>; linux-kernel@vger.kernel.org; Nguyen, Ant=
hony L <anthony.l.nguyen@intel.com>; Kitszel, Przemyslaw <przemyslaw.kitsze=
l@intel.com>; kuba@kernel.org; pabeni@redhat.com; davem@davemloft.net
> Subject: [Intel-wired-lan] [PATCH net-next v2 3/9] i40e: Refactor I40E_MD=
IO_CLAUSE* macros
>
> The macros I40E_MDIO_CLAUSE22* and I40E_MDIO_CLAUSE45* are using I40E_MAS=
K
> together with the same values I40E_GLGEN_MSCA_STCODE_SHIFT and
> I40E_GLGEN_MSCA_OPCODE_SHIFT to define masks.
> Introduce I40E_GLGEN_MSCA_OPCODE_MASK and I40E_GLGEN_MSCA_STCODE_MASK
> for both shifts in i40e_register.h and use them to refactor the macros
> mentioned above.
>=20
> Signed-off-by: Ivan Vecera <ivecera@redhat.com>
> ---
>  .../net/ethernet/intel/i40e/i40e_register.h   |  2 ++
>  drivers/net/ethernet/intel/i40e/i40e_type.h   | 23 +++++++------------
>  2 files changed, 10 insertions(+), 15 deletions(-)
>

Tested-by: Pucha Himasekhar Reddy <himasekharx.reddy.pucha@intel.com> (A Co=
ntingent worker at Intel)