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Thu, 05 Oct 2023 02:53:18 +0000 Received: from nalasex01b.na.qualcomm.com (nalasex01b.na.qualcomm.com [10.47.209.197]) by NALASPPMTA03.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 3952rHx2005537 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 5 Oct 2023 02:53:17 GMT Received: from [10.50.3.48] (10.80.80.8) by nalasex01b.na.qualcomm.com (10.47.209.197) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.36; Wed, 4 Oct 2023 19:53:10 -0700 Message-ID: Date: Thu, 5 Oct 2023 08:23:02 +0530 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/6] dt-bindings: phy: qcom,uniphy-pcie: Document PCIe uniphy Content-Language: en-US To: Krzysztof Kozlowski , , , , , , , , , , , , , , , , , , , , , References: <20231003120846.28626-1-quic_nsekar@quicinc.com> <20231003120846.28626-2-quic_nsekar@quicinc.com> <4bc021c1-0198-41a4-aa73-bf0cf0c0420a@linaro.org> From: Nitheesh Sekar In-Reply-To: <4bc021c1-0198-41a4-aa73-bf0cf0c0420a@linaro.org> Content-Type: text/plain; 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Thu, 05 Oct 2023 08:49:31 -0700 (PDT) On 10/4/2023 12:27 PM, Krzysztof Kozlowski wrote: > On 03/10/2023 14:08, Nitheesh Sekar wrote: >> Document the Qualcomm UNIPHY PCIe 28LP present in IPQ5018. >> >> Signed-off-by: Nitheesh Sekar > Thank you for your patch. There is something to discuss/improve. Sure. Will learn and improve. > > >> --- >> .../bindings/phy/qcom,uniphy-pcie-28lp.yaml | 77 +++++++++++++++++++ >> 1 file changed, 77 insertions(+) >> create mode 100644 Documentation/devicetree/bindings/phy/qcom,uniphy-pcie-28lp.yaml >> >> diff --git a/Documentation/devicetree/bindings/phy/qcom,uniphy-pcie-28lp.yaml b/Documentation/devicetree/bindings/phy/qcom,uniphy-pcie-28lp.yaml >> new file mode 100644 >> index 000000000000..6b2574f9532e >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/phy/qcom,uniphy-pcie-28lp.yaml > Filename should match compatibles and they do not use 28lp. Sure. will remove the 28lp. added it based on the file name. Is "qcom,uniphy-pcie.yaml" good ? Because this will be used for other SoCs as well which will have different compatibles. So i did not include the SoC name, lane and speed info which i have used int he compatible names. > >> @@ -0,0 +1,77 @@ >> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) >> +%YAML 1.2 >> +--- >> +$id: http://devicetree.org/schemas/phy/qcom,uniphy-pcie-28lp.yaml# >> +$schema: http://devicetree.org/meta-schemas/core.yaml# >> + >> +title: Qualcomm UNIPHY PCIe 28LP PHY driver > Driver as Linux driver? Drop. Describe the hardware instead. > >> + >> +maintainers: >> + - Nitheesh Sekar >> + - Sricharan Ramabadhran >> + >> +properties: >> + compatible: >> + enum: >> + - qcom,ipq5018-uniphy-pcie-gen2x1 >> + - qcom,ipq5018-uniphy-pcie-gen2x2 >> + >> + reg: >> + maxItems: 1 >> + >> + clocks: >> + maxItems: 1 >> + >> + clock-names: >> + items: >> + - const: pipe_clk > Drop _clk... or even drop entire clock-names. Not needed for one entry. Sure. Will drop "_clk" part. > >> + >> + resets: >> + maxItems: 2 >> + >> + reset-names: >> + items: >> + - const: phy >> + - const: phy_phy > These are absolutely terrible names. If you have third one, it would be > "phy_phy_phy"? Drop or provide something useful. Sure. Will update. Thanks, Nitheesh