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Thu, 05 Oct 2023 02:55:35 +0000 Received: from nalasex01b.na.qualcomm.com (nalasex01b.na.qualcomm.com [10.47.209.197]) by NALASPPMTA01.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 3952tYxZ009310 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 5 Oct 2023 02:55:34 GMT Received: from [10.50.3.48] (10.80.80.8) by nalasex01b.na.qualcomm.com (10.47.209.197) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.36; Wed, 4 Oct 2023 19:55:27 -0700 Message-ID: Date: Thu, 5 Oct 2023 08:25:24 +0530 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 3/6] phy: qcom: Introduce PCIe UNIPHY 28LP driver Content-Language: en-US To: Krzysztof Kozlowski , , , , , , , , , , , , , , , , , , , , , References: <20231003120846.28626-1-quic_nsekar@quicinc.com> <20231003120846.28626-4-quic_nsekar@quicinc.com> <959363c6-9ecb-4e5f-960d-65dd23b74ce2@kernel.org> From: Nitheesh Sekar In-Reply-To: <959363c6-9ecb-4e5f-960d-65dd23b74ce2@kernel.org> Content-Type: text/plain; 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Thu, 05 Oct 2023 08:52:38 -0700 (PDT) On 10/4/2023 1:43 PM, Krzysztof Kozlowski wrote: > On 03/10/2023 14:08, Nitheesh Sekar wrote: >> Add Qualcomm PCIe UNIPHY 28LP driver support present >> in Qualcomm IPQ5018 SoC and the phy init sequence. >> >> Signed-off-by: Nitheesh Sekar >> --- > ... > >> +static int qcom_uniphy_pcie_probe(struct platform_device *pdev) >> +{ >> + struct qcom_uniphy_pcie *phy; >> + int ret; >> + struct phy *generic_phy; >> + struct phy_provider *phy_provider; >> + struct device *dev = &pdev->dev; >> + struct device_node *np = of_node_get(dev->of_node); >> + >> + phy = devm_kzalloc(&pdev->dev, sizeof(*phy), GFP_KERNEL); >> + if (!phy) >> + return -ENOMEM; >> + >> + platform_set_drvdata(pdev, phy); >> + phy->dev = &pdev->dev; >> + >> + phy->data = of_device_get_match_data(dev); >> + if (!phy->data) >> + return -EINVAL; >> + >> + ret = qcom_uniphy_pcie_get_resources(pdev, phy); >> + if (ret < 0) { >> + dev_err(&pdev->dev, "failed to get resources: %d\n", ret); >> + return ret; > Syntax is: > return dev_err_probe() Sure. will update it and take care of this in future. > > >> + } >> + >> + ret = phy_pipe_clk_register(phy, np); >> + if (ret) >> + dev_err(&pdev->dev, "failed to register phy pipe clk\n"); >> + >> + generic_phy = devm_phy_create(phy->dev, NULL, &pcie_ops); >> + if (IS_ERR(generic_phy)) >> + return PTR_ERR(generic_phy); >> + >> + phy_set_drvdata(generic_phy, phy); >> + phy_provider = devm_of_phy_provider_register(phy->dev, >> + of_phy_simple_xlate); >> + if (IS_ERR(phy_provider)) >> + return PTR_ERR(phy_provider); >> + >> + return 0; >> +} >> + >> +static struct platform_driver qcom_uniphy_pcie_driver = { >> + .probe = qcom_uniphy_pcie_probe, >> + .driver = { >> + .name = "qcom-uniphy-pcie", >> + .owner = THIS_MODULE, > Run coccinelle/coccicheck. Sure. Will do it. > >> + .of_match_table = qcom_uniphy_pcie_id_table, >> + }, >> +}; >> + >> +module_platform_driver(qcom_uniphy_pcie_driver); >> + >> +MODULE_ALIAS("platform:qcom-uniphy-pcie"); > You should not need MODULE_ALIAS() in normal cases. If you need it, > usually it means your device ID table is wrong. Ok. Will remove it. Thanks, Nitheesh