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Date:   Thu, 5 Oct 2023 10:52:01 -0700
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Subject: Re: [PATCH] x86: KVM: Add feature flag for AMD's
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To:     Jim Mattson <jmattson@google.com>
Cc:     Borislav Petkov <bp@alien8.de>, kvm@vger.kernel.org,
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        Pawan Gupta <pawan.kumar.gupta@linux.intel.com>,
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        Sean Christopherson <seanjc@google.com>,
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        Dave Hansen <dave.hansen@linux.intel.com>,
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On 10/5/23 09:41, Jim Mattson wrote:
>>
>> But I'm struggling to think of cases where Intel has read-only
>> "defeature bits" like this one.  There are certainly things like
>> MSR_IA32_MISC_ENABLE_FAST_STRING that can be toggled, but read-only
>> indicators of a departure from established architecture seems ...
>> suboptimal.
...
> CPUID.(EAX=7,ECX=0):EBX[bit 13] (Haswell) - "Deprecates FPU CS and FPU
> DS values if 1."
> CPUID.(EAX=7,ECX=0):EBX[bit 6] (Skylake) - "FDP_EXCPTN_ONLY. x87 FPU
> Data Pointer updated only on x87 exceptions if 1."

Thanks!

Trying to group these does make sense to me.  I don't think people take
architecture breakage lightly, but I certainly never considered that it
might, for instance, be important enough to create a new VM migration pool.

I'll try to keep an eye out for these.