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From:   "Pandey, Radhey Shyam" <radhey.shyam.pandey@amd.com>
To:     "Manne, Nava kishore" <nava.kishore.manne@amd.com>,
        "mdf@kernel.org" <mdf@kernel.org>,
        "hao.wu@intel.com" <hao.wu@intel.com>,
        "yilun.xu@intel.com" <yilun.xu@intel.com>,
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        "linux-fpga@vger.kernel.org" <linux-fpga@vger.kernel.org>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        "Simek, Michal" <michal.simek@amd.com>
Subject: RE: [PATCH] fpga: versal: Add support for 44-bit DMA operations
Thread-Topic: [PATCH] fpga: versal: Add support for 44-bit DMA operations
Thread-Index: AQHZ9ck4D6pW8hQcKkquQ33NBhhYBbA8FNXg
Date:   Fri, 6 Oct 2023 02:54:02 +0000
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References: <20231003071409.4165149-1-nava.kishore.manne@amd.com>
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> -----Original Message-----
> From: Manne, Nava kishore <nava.kishore.manne@amd.com>
> Sent: Tuesday, October 3, 2023 12:44 PM
> To: mdf@kernel.org; hao.wu@intel.com; yilun.xu@intel.com;
> trix@redhat.com; linux-fpga@vger.kernel.org; linux-kernel@vger.kernel.org
> Cc: Pandey, Radhey Shyam <radhey.shyam.pandey@amd.com>
> Subject: [PATCH] fpga: versal: Add support for 44-bit DMA operations
>=20
> The existing implementation support only 32-bit DMA operation.
> So, it fails to load the bitstream for the high DDR designs(Beyond 4GB).
> To fix this issue update the DMA mask handling logic to support 44-bit DM=
A
> operations.
>=20
> Signed-off-by: Nava kishore Manne <nava.kishore.manne@amd.com>
> Reviewed-by: Radhey Shyam Pandey <radhey.shyam.pandey@amd.com>
As I reviewed it on internal list - adding my reviewed tag here as well.
Reviewed-by: Radhey Shyam Pandey <radhey.shyam.pandey@amd.com>
Thanks!
> ---
>  drivers/fpga/versal-fpga.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>=20
> diff --git a/drivers/fpga/versal-fpga.c b/drivers/fpga/versal-fpga.c inde=
x
> e1601b3a345b..3710e8f01be2 100644
> --- a/drivers/fpga/versal-fpga.c
> +++ b/drivers/fpga/versal-fpga.c
> @@ -48,7 +48,7 @@ static int versal_fpga_probe(struct platform_device
> *pdev)
>  	struct fpga_manager *mgr;
>  	int ret;
>=20
> -	ret =3D dma_set_mask_and_coherent(&pdev->dev,
> DMA_BIT_MASK(32));
> +	ret =3D dma_set_mask_and_coherent(&pdev->dev,
> DMA_BIT_MASK(44));
>  	if (ret < 0) {
>  		dev_err(dev, "no usable DMA configuration\n");
>  		return ret;
> --
> 2.25.1