Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:7 as permitted sender) client-ip=2620:137:e000::3:7;
Message-ID: <28bf111f-b965-4d38-884b-bc3a0b68a6cc@quicinc.com>
Date:   Fri, 6 Oct 2023 16:24:59 +0530
MIME-Version: 1.0
User-Agent: Mozilla Thunderbird
Subject: Re: [PATCH v1 1/5] dt-bindings: PCI: qcom-ep: Add support for SA8775P
 SoC
To:     Rob Herring <robh@kernel.org>,
        Mrinmay Sarkar <quic_msarkar@quicinc.com>
CC:     <agross@kernel.org>, <andersson@kernel.org>,
        <krzysztof.kozlowski+dt@linaro.org>, <conor+dt@kernel.org>,
        <konrad.dybcio@linaro.org>, <mani@kernel.org>,
        <quic_nitegupt@quicinc.com>, <quic_ramkri@quicinc.com>,
        <quic_nayiluri@quicinc.com>, <quic_krichai@quicinc.com>,
        <quic_vbadigan@quicinc.com>, <quic_parass@quicinc.com>,
        Bjorn Helgaas <bhelgaas@google.com>,
        "Lorenzo Pieralisi" <lpieralisi@kernel.org>,
        =?UTF-8?Q?Krzysztof_Wilczy=C5=84ski?= <kw@linux.com>,
        Kishon Vijay Abraham I <kishon@kernel.org>,
        Vinod Koul <vkoul@kernel.org>, <linux-pci@vger.kernel.org>,
        <linux-arm-msm@vger.kernel.org>, <devicetree@vger.kernel.org>,
        <linux-kernel@vger.kernel.org>, <mhi@lists.linux.dev>,
        <linux-phy@lists.infradead.org>
References: <1695218113-31198-1-git-send-email-quic_msarkar@quicinc.com>
 <1695218113-31198-2-git-send-email-quic_msarkar@quicinc.com>
 <20230921183850.GA762694-robh@kernel.org>
Content-Language: en-US
From:   Shazad Hussain <quic_shazhuss@quicinc.com>
In-Reply-To: <20230921183850.GA762694-robh@kernel.org>
Content-Type: text/plain; charset="UTF-8"; format=flowed
Content-Transfer-Encoding: 7bit
Precedence: bulk


On 9/22/2023 12:08 AM, Rob Herring wrote:
> On Wed, Sep 20, 2023 at 07:25:08PM +0530, Mrinmay Sarkar wrote:
>> Add devicetree bindings support for SA8775P SoC.
>> Define reg and interrupt per platform.
>>
>> Signed-off-by: Mrinmay Sarkar <quic_msarkar@quicinc.com>
>> ---
>>   .../devicetree/bindings/pci/qcom,pcie-ep.yaml      | 130 +++++++++++++++++----
>>   1 file changed, 108 insertions(+), 22 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml
>> index a223ce0..e860e8f 100644
>> --- a/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml
>> +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml
>> @@ -13,6 +13,7 @@ properties:
>>     compatible:
>>       oneOf:
>>         - enum:
>> +          - qcom,sa8775p-pcie-ep
>>             - qcom,sdx55-pcie-ep
>>             - qcom,sm8450-pcie-ep
>>         - items:
>> @@ -20,29 +21,19 @@ properties:
>>             - const: qcom,sdx55-pcie-ep
>>   
>>     reg:
>> -    items:
>> -      - description: Qualcomm-specific PARF configuration registers
>> -      - description: DesignWare PCIe registers
>> -      - description: External local bus interface registers
>> -      - description: Address Translation Unit (ATU) registers
>> -      - description: Memory region used to map remote RC address space
>> -      - description: BAR memory region
>> +    minItems: 6
>> +    maxItems: 7
>>   
>>     reg-names:
>> -    items:
>> -      - const: parf
>> -      - const: dbi
>> -      - const: elbi
>> -      - const: atu
>> -      - const: addr_space
>> -      - const: mmio
>> +    minItems: 6
>> +    maxItems: 7
> 
> Don't move these into if/then schemas. Then we are duplicating the
> names, and there is no reason to keep them aligned for new compatibles.
> 
> Rob

Hi Rob,
As we have one extra reg property (dma) required for sa8775p-pcie-ep,
isn't it expected to be moved in if/then as per number of regs
required. Anyways we would have duplication of some properties for new
compatibles where the member numbers differs for a property.

Are you suggesting to add the extra reg property (dma) in the existing 
reg and reg-names list, and add minItems/maxItems for all compatibles 
present in this file ?

-Shazad