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[2620:137:e000::3:8]) by mx.google.com with ESMTPS id y7-20020a636407000000b005898e10f9c4si1128578pgb.203.2023.10.06.04.44.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 06 Oct 2023 04:44:40 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:8 as permitted sender) client-ip=2620:137:e000::3:8; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=n+IqMt5G; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:8 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by fry.vger.email (Postfix) with ESMTP id 875C3808EF45; Fri, 6 Oct 2023 04:44:38 -0700 (PDT) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.10 at fry.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232093AbjJFLoa (ORCPT + 99 others); Fri, 6 Oct 2023 07:44:30 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45536 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231887AbjJFLo3 (ORCPT ); Fri, 6 Oct 2023 07:44:29 -0400 Received: from fllv0016.ext.ti.com (fllv0016.ext.ti.com [198.47.19.142]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6D4D2C5; Fri, 6 Oct 2023 04:44:28 -0700 (PDT) Received: from fllv0034.itg.ti.com ([10.64.40.246]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 396BiMw8069181; Fri, 6 Oct 2023 06:44:22 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1696592662; bh=okUnWdhiqZuABrpXo3IYpIqf2nM+f4960a0GhX4RfYI=; h=Date:From:To:CC:Subject:References:In-Reply-To; b=n+IqMt5GG+vaKMaGHTj4hhyL9lEb//vUjz+SS5BKFzbdBJlW5mP1CyyOS8kSSlLlO 3EiMDhmRD64UfZBitRIH29nP94c+opr+ZfJeJAF8VERqzlMuev33PjB1sXgHWvPPxr fTJsjd4GfCl9/jj0qihDqdJOmKCB5liFBmH+Zwkc= Received: from DFLE102.ent.ti.com (dfle102.ent.ti.com [10.64.6.23]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 396BiMBM019622 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Fri, 6 Oct 2023 06:44:22 -0500 Received: from DFLE109.ent.ti.com (10.64.6.30) by DFLE102.ent.ti.com (10.64.6.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Fri, 6 Oct 2023 06:44:22 -0500 Received: from lelv0327.itg.ti.com (10.180.67.183) by DFLE109.ent.ti.com (10.64.6.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Fri, 6 Oct 2023 06:44:22 -0500 Received: from localhost (ileaxei01-snat.itg.ti.com [10.180.69.5]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 396BiM0U015998; Fri, 6 Oct 2023 06:44:22 -0500 Date: Fri, 6 Oct 2023 06:44:22 -0500 From: Nishanth Menon To: Keerthy CC: , , , , , , , , Subject: Re: [PATCH v7 5/7] arm64: dts: ti: k3-j784s4-mcu: Add the mcu domain watchdog instances Message-ID: <20231006114422.avymeap7h5ocs6zq@dreadlock> References: <20231006042901.6474-1-j-keerthy@ti.com> <20231006042901.6474-6-j-keerthy@ti.com> <20231006113410.tibvxxkeuujqnbv4@evolution> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: <20231006113410.tibvxxkeuujqnbv4@evolution> X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-Spam-Status: No, score=2.7 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,RCVD_IN_SBL_CSS,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on fry.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (fry.vger.email [0.0.0.0]); Fri, 06 Oct 2023 04:44:38 -0700 (PDT) X-Spam-Level: ** > > + mcu_watchdog1: watchdog@40610000 { > > + compatible = "ti,j7-rti-wdt"; > > + reg = <0x00 0x40610000 0x00 0x100>; > > + clocks = <&k3_clks 368 1>; > > + power-domains = <&k3_pds 368 TI_SCI_PD_EXCLUSIVE>; > > + assigned-clocks = <&k3_clks 368 0>; > > + assigned-clock-parents = <&k3_clks 368 4>; > > Please DONOT ignore the review comments - I did ask the documentation in > dts as well. reason being that this is what people will see rather than > dig up the commit log. it should be intutive when reading the dts why > nodes are disabled by default Vs the standard of leaving it enabled by > default. Given esp that these peripherals do not have anything to do > with board semantics (pinmux or something similar) to be complete. > > > + status = "disabled"; Just providing clarifying comment - something like this is probably more appropriate: /* Tightly coupled to R5F */ status = "reserved"; The rti needs to be handled by R5F and is reserved for firmware usage. -- Regards, Nishanth Menon Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D