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From:   Yu Zhao <yuzhao@google.com>
Date:   Fri, 6 Oct 2023 16:28:02 -0600
Message-ID: <CAOUHufb=qurWDFaX2TPQrsmUpEz+VRwm=SxivYuuDiJ4D-f0+g@mail.gmail.com>
Subject: Re: [PATCH v6 6/9] mm: thp: Add "recommend" option for anon_orders
To:     David Hildenbrand <david@redhat.com>,
        Ryan Roberts <ryan.roberts@arm.com>
Cc:     Andrew Morton <akpm@linux-foundation.org>,
        Matthew Wilcox <willy@infradead.org>,
        Yin Fengwei <fengwei.yin@intel.com>,
        Catalin Marinas <catalin.marinas@arm.com>,
        Anshuman Khandual <anshuman.khandual@arm.com>,
        Yang Shi <shy828301@gmail.com>,
        "Huang, Ying" <ying.huang@intel.com>, Zi Yan <ziy@nvidia.com>,
        Luis Chamberlain <mcgrof@kernel.org>,
        Itaru Kitayama <itaru.kitayama@gmail.com>,
        "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com>,
        John Hubbard <jhubbard@nvidia.com>,
        David Rientjes <rientjes@google.com>,
        Vlastimil Babka <vbabka@suse.cz>,
        Hugh Dickins <hughd@google.com>, linux-mm@kvack.org,
        linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org
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On Fri, Oct 6, 2023 at 2:08=E2=80=AFPM David Hildenbrand <david@redhat.com>=
 wrote:
>
> On 29.09.23 13:44, Ryan Roberts wrote:
> > In addition to passing a bitfield of folio orders to enable for THP,
> > allow the string "recommend" to be written, which has the effect of
> > causing the system to enable the orders preferred by the architecture
> > and by the mm. The user can see what these orders are by subsequently
> > reading back the file.
> >
> > Note that these recommended orders are expected to be static for a give=
n
> > boot of the system, and so the keyword "auto" was deliberately not used=
,
> > as I want to reserve it for a possible future use where the "best" orde=
r
> > is chosen more dynamically at runtime.
> >
> > Recommended orders are determined as follows:
> >    - PMD_ORDER: The traditional THP size
> >    - arch_wants_pte_order() if implemented by the arch
> >    - PAGE_ALLOC_COSTLY_ORDER: The largest order kept on per-cpu free li=
st
> >
> > arch_wants_pte_order() can be overridden by the architecture if desired=
.
> > Some architectures (e.g. arm64) can coalsece TLB entries if a contiguou=
s
> > set of ptes map physically contigious, naturally aligned memory, so thi=
s
> > mechanism allows the architecture to optimize as required.
> >
> > Here we add the default implementation of arch_wants_pte_order(), used
> > when the architecture does not define it, which returns -1, implying
> > that the HW has no preference.
> >
> > Signed-off-by: Ryan Roberts <ryan.roberts@arm.com>
> > ---
> >   Documentation/admin-guide/mm/transhuge.rst |  4 ++++
> >   include/linux/pgtable.h                    | 13 +++++++++++++
> >   mm/huge_memory.c                           | 14 +++++++++++---
> >   3 files changed, 28 insertions(+), 3 deletions(-)
> >
> > diff --git a/Documentation/admin-guide/mm/transhuge.rst b/Documentation=
/admin-guide/mm/transhuge.rst
> > index 732c3b2f4ba8..d6363d4efa3a 100644
> > --- a/Documentation/admin-guide/mm/transhuge.rst
> > +++ b/Documentation/admin-guide/mm/transhuge.rst
> > @@ -187,6 +187,10 @@ pages (=3D16K if the page size is 4K). The example=
 above enables order-9
> >   By enabling multiple orders, allocation of each order will be
> >   attempted, highest to lowest, until a successful allocation is made.
> >   If the PMD-order is unset, then no PMD-sized THPs will be allocated.
> > +It is also possible to enable the recommended set of orders, which
> > +will be optimized for the architecture and mm::
> > +
> > +     echo recommend >/sys/kernel/mm/transparent_hugepage/anon_orders
> >
> >   The kernel will ignore any orders that it does not support so read th=
e
> >   file back to determine which orders are enabled::
> > diff --git a/include/linux/pgtable.h b/include/linux/pgtable.h
> > index af7639c3b0a3..0e110ce57cc3 100644
> > --- a/include/linux/pgtable.h
> > +++ b/include/linux/pgtable.h
> > @@ -393,6 +393,19 @@ static inline void arch_check_zapped_pmd(struct vm=
_area_struct *vma,
> >   }
> >   #endif
> >
> > +#ifndef arch_wants_pte_order
> > +/*
> > + * Returns preferred folio order for pte-mapped memory. Must be in ran=
ge [0,
> > + * PMD_ORDER) and must not be order-1 since THP requires large folios =
to be at
> > + * least order-2. Negative value implies that the HW has no preference=
 and mm
> > + * will choose it's own default order.
> > + */
> > +static inline int arch_wants_pte_order(void)
> > +{
> > +     return -1;
> > +}
> > +#endif
> > +
> >   #ifndef __HAVE_ARCH_PTEP_GET_AND_CLEAR
> >   static inline pte_t ptep_get_and_clear(struct mm_struct *mm,
> >                                      unsigned long address,
> > diff --git a/mm/huge_memory.c b/mm/huge_memory.c
> > index bcecce769017..e2e2d3906a21 100644
> > --- a/mm/huge_memory.c
> > +++ b/mm/huge_memory.c
> > @@ -464,10 +464,18 @@ static ssize_t anon_orders_store(struct kobject *=
kobj,
> >       int err;
> >       int ret =3D count;
> >       unsigned int orders;
> > +     int arch;
> >
> > -     err =3D kstrtouint(buf, 0, &orders);
> > -     if (err)
> > -             ret =3D -EINVAL;
> > +     if (sysfs_streq(buf, "recommend")) {
> > +             arch =3D max(arch_wants_pte_order(), PAGE_ALLOC_COSTLY_OR=
DER);
> > +             orders =3D BIT(arch);
> > +             orders |=3D BIT(PAGE_ALLOC_COSTLY_ORDER);
> > +             orders |=3D BIT(PMD_ORDER);
> > +     } else {
> > +             err =3D kstrtouint(buf, 0, &orders);
> > +             if (err)
> > +                     ret =3D -EINVAL;
> > +     }
> >
> >       if (ret > 0) {
> >               orders &=3D THP_ORDERS_ALL_ANON;
>
> :/ don't really like that. Regarding my proposal, one could have
> something like that in an "auto" setting for the "enabled" value, or a
> "recommended" setting [not sure].

Me either.

Again this is something I call random --  we only discussed "auto",
and yes, the commit message above explained why "recommended" here but
it has never surfaced in previous discussions, has it?

If so, this reinforces what I said here [1].

[1] https://lore.kernel.org/mm-commits/CAOUHufYEKx5_zxRJkeqrmnStFjR+pVQdpZ4=
0ATSTaxLA_iRPGw@mail.gmail.com/