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[209.85.167.45]) by smtp.gmail.com with ESMTPSA id w5-20020ac25985000000b0050579c4d0d5sm762792lfn.133.2023.10.07.11.07.26 for (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sat, 07 Oct 2023 11:07:26 -0700 (PDT) Received: by mail-lf1-f45.google.com with SMTP id 2adb3069b0e04-50567477b29so4159004e87.3 for ; Sat, 07 Oct 2023 11:07:26 -0700 (PDT) X-Received: by 2002:a05:6512:3706:b0:500:ce5f:7635 with SMTP id z6-20020a056512370600b00500ce5f7635mr8302479lfr.54.1696702046184; Sat, 07 Oct 2023 11:07:26 -0700 (PDT) MIME-Version: 1.0 References: <20230721161018.50214-1-brgerst@gmail.com> <5def7e28-3949-9685-7ddf-19b550847ef0@zytor.com> In-Reply-To: From: Linus Torvalds Date: Sat, 7 Oct 2023 11:07:08 -0700 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v2 0/6] x86: Clean up fast syscall return validation To: Uros Bizjak Cc: "H. Peter Anvin" , Ingo Molnar , Brian Gerst , linux-kernel@vger.kernel.org, x86@kernel.org, Thomas Gleixner , Borislav Petkov , Andy Lutomirski , =?UTF-8?Q?Mika_Penttil=C3=A4?= , Denys Vlasenko , Peter Zijlstra , Josh Poimboeuf Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=2.7 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, RCVD_IN_SBL_CSS,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on groat.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (groat.vger.email [0.0.0.0]); Sat, 07 Oct 2023 11:09:13 -0700 (PDT) X-Spam-Level: ** On Sat, 7 Oct 2023 at 02:57, Uros Bizjak wrote: > > Please note that 8-bit movb instruction in fact represents insert into > word-mode register. The compiler does not know how this word-mode > register will be used, so to avoid partial register stalls, it takes a > cautious approach and (with -O2) moves constant to a register with a > word-width instruction. Yes. In this case I really think it's our kernel code that is disgusting. People seem to think that because cpu_feature_enabled() uses static jumps, it's somehow "free". Not so. The static jumps are often horrendous for code quality, and they effectively make the compiler blind to otherwise obvious optimizations. We need to stop using those so blindly. I see code like this return pgtable_l5_enabled() ? PT64_ROOT_5LEVEL : PT64_ROOT_4LEVEL; and it just makes me sad. And yes, that virtual mask is disgusting. This: #define __VIRTUAL_MASK_SHIFT (pgtable_l5_enabled() ? 56 : 47) is *NOT* cheap. The end result is *not* a constant, it's a two-way branch, and while the branch is static and the compiler may then optimize each side of the branch with the constant in question, most of the time it just results in *disgusting* code like this where gcc just has to load a constant into a register, and treat it as a variable. With the code shuffling, it's possibly *more* expensive than just loading from memory, in that you just change a D$ load into an I$ one instead. I'm sure that looks great on benchmarks that stay entirely in the I$, but ... Something like using alternatives is *much* cheaper. Better yet is the suggestion to simplify the conditionals entirely to not depend on the virtual shift at all (ie our recent access_ok() simplifications that were due to _another_ CPU feature) > Also, the compiler is quite eager to CSE constants. When there are two > or more uses of the same constant, it will move a constant into the > register first. Now, honestly, that may be a good thing for other architectures that have issues with constants, but on x86 - and integer constants - it's likely a bad thing unless the constant is particularly complicated. Most x86 instructions will take the usual 8/32-bit constants (but if we have arbitrary 64-bit ones, you tend to need them in registers). Linus