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Mon, 09 Oct 2023 09:10:59 +0000 Received: from nalasex01b.na.qualcomm.com (nalasex01b.na.qualcomm.com [10.47.209.197]) by NALASPPMTA01.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 3999AvP5023167 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 9 Oct 2023 09:10:57 GMT Received: from [10.201.200.63] (10.80.80.8) by nalasex01b.na.qualcomm.com (10.47.209.197) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.36; Mon, 9 Oct 2023 02:10:51 -0700 Message-ID: Date: Mon, 9 Oct 2023 14:40:47 +0530 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 2/6] dt-bindings: PCI: qcom: Add IPQ5108 SoC Content-Language: en-US To: Konrad Dybcio , , , , , , , , , , , , , , , , , , , , References: <20231003120846.28626-1-quic_nsekar@quicinc.com> <20231003120846.28626-3-quic_nsekar@quicinc.com> <123f7c9a-587c-410f-a3fe-545f10bd3d09@linaro.org> From: Nitheesh Sekar In-Reply-To: <123f7c9a-587c-410f-a3fe-545f10bd3d09@linaro.org> Content-Type: text/plain; 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Mon, 09 Oct 2023 02:11:45 -0700 (PDT) X-Spam-Level: ** On 10/7/2023 5:55 AM, Konrad Dybcio wrote: > On 3.10.2023 14:08, Nitheesh Sekar wrote: >> Add support for the PCIe controller on the Qualcomm >> IPQ5108 SoC to the bindings. >> >> Signed-off-by: Nitheesh Sekar >> --- > [...] > >> + - if: >> + properties: >> + compatible: >> + contains: >> + enum: >> + - qcom,pcie-ipq5018 >> + then: >> + properties: >> + clocks: >> + minItems: 6 >> + maxItems: 6 >> + clock-names: >> + items: >> + - const: iface # PCIe to SysNOC BIU clock > What's a BIU? > > Konrad It is Bus Interface Unit. Thanks, Nitheesh