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[5.157.101.10]) by smtp.gmail.com with ESMTPSA id hn32-20020a05600ca3a000b004053e9276easm13546241wmb.32.2023.10.09.06.56.09 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 09 Oct 2023 06:56:11 -0700 (PDT) Message-ID: <1e2a4d87-5478-4655-993d-7f404d507c82@linaro.org> Date: Mon, 9 Oct 2023 15:56:09 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 3/7] dt-bindings: media: Document STM32MP25 VENC video encoder Content-Language: en-US To: Hugues FRUCHET , Ezequiel Garcia , Philipp Zabel , Mauro Carvalho Chehab , Hans Verkuil , linux-media@vger.kernel.org, Maxime Coquelin , Alexandre Torgue , linux-stm32@st-md-mailman.stormreply.com, Rob Herring , Krzysztof Kozlowski , Conor Dooley , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org Cc: Andrzej Pietrasiewicz References: <20231004091552.3531659-1-hugues.fruchet@foss.st.com> <20231004091552.3531659-4-hugues.fruchet@foss.st.com> <6bc60e4a-ddf1-4125-ba27-53ab55a553d2@linaro.org> <0de2ae74-2ba1-0e8d-aa7b-77806ac8b252@foss.st.com> From: Krzysztof Kozlowski Autocrypt: addr=krzysztof.kozlowski@linaro.org; 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charset=UTF-8 Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=2.7 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, RCVD_IN_SBL_CSS,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lipwig.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (lipwig.vger.email [0.0.0.0]); Mon, 09 Oct 2023 06:56:33 -0700 (PDT) X-Spam-Level: ** On 09/10/2023 15:49, Hugues FRUCHET wrote: > Hi Krzysztof, > > On 10/5/23 21:45, Krzysztof Kozlowski wrote: >> On 04/10/2023 11:15, Hugues Fruchet wrote: >>> Add STM32MP25 VENC video encoder bindings. >>> >> >> I don't understand why this binding is separate from video decoder. >> Merge them. > VDEC and VENC are two independent IPs with their own clock, reset, > interrupt & register set, they have their own access to APB/AXI bus. > Moreover future chipsets may embed only VENC or VDEC. > > Hoping that this clarifies the reason of two different bindings. No, it does not. These are no reasons to have independent bindings, except when having actual impact on the bindings. The bindings look identical. What are the differences? Best regards, Krzysztof