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[209.85.218.54]) by smtp.gmail.com with ESMTPSA id rv18-20020a17090710d200b0099364d9f0e6sm8776027ejb.117.2023.10.10.11.43.06 for (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 10 Oct 2023 11:43:06 -0700 (PDT) Received: by mail-ej1-f54.google.com with SMTP id a640c23a62f3a-9ae75ece209so1088792366b.3 for ; Tue, 10 Oct 2023 11:43:06 -0700 (PDT) X-Received: by 2002:a17:907:2704:b0:9ae:5492:64e with SMTP id w4-20020a170907270400b009ae5492064emr14580442ejk.25.1696963386250; Tue, 10 Oct 2023 11:43:06 -0700 (PDT) MIME-Version: 1.0 References: <20231010164234.140750-1-ubizjak@gmail.com> <108536FC-445C-41F9-8A87-B7D31A45AC4B@vmware.com> In-Reply-To: <108536FC-445C-41F9-8A87-B7D31A45AC4B@vmware.com> From: Linus Torvalds Date: Tue, 10 Oct 2023 11:42:49 -0700 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v2 -tip] x86/percpu: Use C for arch_raw_cpu_ptr() To: Nadav Amit Cc: Uros Bizjak , "the arch/x86 maintainers" , Linux Kernel Mailing List , Andy Lutomirski , Brian Gerst , Denys Vlasenko , "H . Peter Anvin" , Peter Zijlstra , Thomas Gleixner , Josh Poimboeuf Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Spam-Status: No, score=2.7 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, RCVD_IN_SBL_CSS,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on groat.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (groat.vger.email [0.0.0.0]); Tue, 10 Oct 2023 11:43:30 -0700 (PDT) X-Spam-Level: ** On Tue, 10 Oct 2023 at 11:25, Nadav Amit wrote: > > As a minor note the proposed assembly version seems to be missing > __FORCE_ORDER as an input argument to prevent reordering past preempt_ena= ble > and preempt_disable. But that=E2=80=99s really not the main point. Hmm. No, it's probably *is* the main point - see my reply to Uros that the CSE on the inline asm itself gets rid of duplication. And yes, we currently rely on that asm CSE for doing 'current' and not reloading the value all the time. So yes, we'd like to have a barrier for not moving it across the preemption barriers, and __FORCE_ORDER would seem to be a good way to do that. I really suspect that 'rdgsbase' is better than a memory load in practice, but I have no numbers to back that up, apart from a "it's not a slow instruction, and core CPU is generally better than memory". Linus