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[209.85.208.43]) by smtp.gmail.com with ESMTPSA id dv8-20020a170906b80800b0099cc36c4681sm8774078ejb.157.2023.10.10.11.52.42 for (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 10 Oct 2023 11:52:42 -0700 (PDT) Received: by mail-ed1-f43.google.com with SMTP id 4fb4d7f45d1cf-51e28cac164so275279a12.1 for ; Tue, 10 Oct 2023 11:52:42 -0700 (PDT) X-Received: by 2002:a05:6402:348e:b0:530:cc8c:9e41 with SMTP id v14-20020a056402348e00b00530cc8c9e41mr12747972edc.19.1696963962488; Tue, 10 Oct 2023 11:52:42 -0700 (PDT) MIME-Version: 1.0 References: <20231010164234.140750-1-ubizjak@gmail.com> In-Reply-To: From: Linus Torvalds Date: Tue, 10 Oct 2023 11:52:25 -0700 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v2 -tip] x86/percpu: Use C for arch_raw_cpu_ptr() To: Uros Bizjak Cc: x86@kernel.org, linux-kernel@vger.kernel.org, Nadav Amit , Andy Lutomirski , Brian Gerst , Denys Vlasenko , "H . Peter Anvin" , Peter Zijlstra , Thomas Gleixner , Josh Poimboeuf Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=2.7 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, RCVD_IN_SBL_CSS,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on howler.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (howler.vger.email [0.0.0.0]); Tue, 10 Oct 2023 11:52:55 -0700 (PDT) X-Spam-Level: ** On Tue, 10 Oct 2023 at 11:41, Uros Bizjak wrote: > > Yes, but does it CSE the load from multiple addresses? Yes, it should do that just right, because the *asm* itself is identical, just the offsets (that gcc then adds separately) would be different. This is not unlike how we depend on gcc CSE'ing the "current" part when doing multiple accesses of different members off that: static __always_inline struct task_struct *get_current(void) { return this_cpu_read_stable(pcpu_hot.current_task); } with this_cpu_read_stable() being an inline asm that lacks the memory component (the same way the fallback hides it by just using "%%gs:this_cpu_off" directly inside the asm, instead of exposing it as a memory access to gcc). Of course, I think that with the "__seg_gs" patches, we *could* expose the "%%gs:this_cpu_off" part to gcc, since gcc hopefully then can do the alias analysis on that side and see that it can CSE the thing anyway. That might be a better choice than __FORCE_ORDER, in fact. IOW, something like static __always_inline unsigned long new_cpu_offset(void) { unsigned long res; asm(ALTERNATIVE( "movq " __percpu_arg(1) ",%0", "rdgsbase %0", X86_FEATURE_FSGSBASE) : "=r" (res) : "m" (this_cpu_off)); return res; } would presumably work together with your __seg_gs stuff. UNTESTED!! Linus