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Wed, 11 Oct 2023 03:50:15 -0700 (PDT) Date: Wed, 11 Oct 2023 13:50:13 +0300 From: Serge Semin To: Kory Maincent Cc: Manivannan Sadhasivam , Gustavo Pimentel , Vinod Koul , Cai Huoqing , Thomas Petazzoni , dmaengine@vger.kernel.org, linux-kernel@vger.kernel.org, Herve Codina Subject: Re: [PATCH v3 5/6] dmaengine: dw-edma: HDMA: Add sync read before starting the DMA transfer in remote setup Message-ID: References: <20231011-b4-feature_hdma_mainline-v3-0-24ee0c979c6f@bootlin.com> <20231011-b4-feature_hdma_mainline-v3-5-24ee0c979c6f@bootlin.com> <6adlujxc4cnrxbl5fbqpg5fishq7jvk6w6chgjyktbwcxd2dvi@w4ayo5ooh7fq> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <6adlujxc4cnrxbl5fbqpg5fishq7jvk6w6chgjyktbwcxd2dvi@w4ayo5ooh7fq> X-Spam-Status: No, score=3.0 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,RCVD_IN_SBL_CSS, SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.6 X-Spam-Level: ** X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on fry.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (fry.vger.email [0.0.0.0]); Wed, 11 Oct 2023 03:50:41 -0700 (PDT) On Wed, Oct 11, 2023 at 01:47:49PM +0300, Serge Semin wrote: > On Wed, Oct 11, 2023 at 10:11:44AM +0200, Kory Maincent wrote: > > The Linked list element and pointer are not stored in the same memory as > > the HDMA controller register. If the doorbell register is toggled before > > the full write of the linked list a race condition error can appears. > > s/can appears/may occur It should have been: s/can appears/will occur -Serge(y) > > > In remote setup we can only use a readl to the memory to assured the full > > write has occurred. > > s/assured/assure > > > > > Fixes: e74c39573d35 ("dmaengine: dw-edma: Add support for native HDMA") > > Signed-off-by: Kory Maincent > > Reviewed-by: Serge Semin > > -Serge(y) > > > --- > > > > Changes in v2: > > - Move the sync read in a function. > > - Add commments > > --- > > drivers/dma/dw-edma/dw-hdma-v0-core.c | 17 +++++++++++++++++ > > 1 file changed, 17 insertions(+) > > > > diff --git a/drivers/dma/dw-edma/dw-hdma-v0-core.c b/drivers/dma/dw-edma/dw-hdma-v0-core.c > > index 04b0bcb6ded9..13b6aec6a6de 100644 > > --- a/drivers/dma/dw-edma/dw-hdma-v0-core.c > > +++ b/drivers/dma/dw-edma/dw-hdma-v0-core.c > > @@ -222,6 +222,20 @@ static void dw_hdma_v0_core_write_chunk(struct dw_edma_chunk *chunk) > > dw_hdma_v0_write_ll_link(chunk, i, control, chunk->ll_region.paddr); > > } > > > > +static void dw_hdma_v0_sync_ll_data(struct dw_edma_chunk *chunk) > > +{ > > + /* > > + * In case of remote HDMA engine setup, the DW PCIe RP/EP internals > > + * configuration registers and Application memory are normally accessed > > + * over different buses. Ensure LL-data reaches the memory before the > > + * doorbell register is toggled by issuing the dummy-read from the remote > > + * LL memory in a hope that the posted MRd TLP will return only after the > > + * last MWr TLP is completed > > + */ > > + if (!(chunk->chan->dw->chip->flags & DW_EDMA_CHIP_LOCAL)) > > + readl(chunk->ll_region.vaddr.io); > > +} > > + > > static void dw_hdma_v0_core_start(struct dw_edma_chunk *chunk, bool first) > > { > > struct dw_edma_chan *chan = chunk->chan; > > @@ -252,6 +266,9 @@ static void dw_hdma_v0_core_start(struct dw_edma_chunk *chunk, bool first) > > /* Set consumer cycle */ > > SET_CH_32(dw, chan->dir, chan->id, cycle_sync, > > HDMA_V0_CONSUMER_CYCLE_STAT | HDMA_V0_CONSUMER_CYCLE_BIT); > > + > > + dw_hdma_v0_sync_ll_data(chunk); > > + > > /* Doorbell */ > > SET_CH_32(dw, chan->dir, chan->id, doorbell, HDMA_V0_DOORBELL_START); > > } > > > > -- > > 2.25.1 > >