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Miller II" , Guenter Roeck Subject: Re: [PATCH 2/2] watchdog: aspeed: Add support for aspeed,reset-mask DT property Thread-Topic: [PATCH 2/2] watchdog: aspeed: Add support for aspeed,reset-mask DT property Thread-Index: AQHZ/G9tblq8T/MA3E+QMMjvccu1TA== Date: Wed, 11 Oct 2023 18:19:09 +0000 Message-ID: <20231011181909.GK19997@packtop> References: <20230922104231.1434-4-zev@bewilderbeest.net> <20230922104231.1434-6-zev@bewilderbeest.net> In-Reply-To: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-ms-publictraffictype: Email x-ms-traffictypediagnostic: CO6PR04MB7843:EE_|BN8PR04MB6403:EE_ x-ms-office365-filtering-correlation-id: 7cd06e8c-cf98-4ddc-4960-08dbca869041 x-ms-exchange-senderadcheck: 1 x-ms-exchange-antispam-relay: 0 x-microsoft-antispam: BCL:0; x-microsoft-antispam-message-info: zeRuC/gRQ6RhsK60KTzeLpR+eKcl4fp0nUBBKuV+BwGXpzbY8ZNsjPugzNG2uKBDtbixh9nnFEnvpPp+R9tHHrQ5eLQ3XaMUggHSFmhy3F8qvAZDAAHyZN2DC/eLFdOxcAKGcJBRu2COyIWqiI89qBc9pNfywm936yyGnRgurWIevq2SxBO6PFgLrUQfg/Z2OGZsqcPQDs3QlelI08YQ2CY0V5S9fgsXXzYqXDXaqsNp6XFQH7ntsdI42GRiAVjz8vkLkl02aNQirlHX3KoJZD9+7YLQXKtEedCpiOxxVxd38TzEwY0rjE/7YRHbZ1p9IxtlLKitZjEXA3BT43sm9t3vMfiSRG+Cyilb99NWeyQcC7MEhyOg9arPWcC7paZbtB4AUJwTy4Edf5vdfZPHaV1l2nEwPbOjVRUGo8C7MrVTq/KDYZfx24Pmlm2M3IrozzF/sCQfMD4tXCGgtqobIVzPZo7mug7YZMAyFbn5iIct6x69JHz5/6ABNcJIn+nJHddIY7KYWXzEInNPVbM8XJ43gI7sN5OA+ILdtMIfWIhXwX1cv6VCqDDM0+BArfyYbHYDWgsez/4R3uXV/SgckXaqVkfU04nuo3F5Dpxn1TacTtbujh0lxoTm980xllwW x-forefront-antispam-report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:CO6PR04MB7843.namprd04.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230031)(7916004)(366004)(376002)(136003)(396003)(39860400002)(346002)(230922051799003)(186009)(451199024)(1800799009)(64100799003)(91956017)(478600001)(6486002)(71200400001)(86362001)(33716001)(6512007)(9686003)(6506007)(33656002)(1076003)(38100700002)(41300700001)(5660300002)(64756008)(66946007)(66556008)(66476007)(66446008)(54906003)(76116006)(316002)(6916009)(7416002)(38070700005)(8936002)(8676002)(4326008)(2906002)(122000001)(83380400001);DIR:OUT;SFP:1102; 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Wed, 11 Oct 2023 12:21:05 -0700 (PDT) X-Spam-Level: ** On Wed, Oct 11, 2023 at 02:26:32AM PDT, Joel Stanley wrote: >On Fri, 22 Sept 2023 at 20:12, Zev Weiss wrote: >> >> This property allows the device-tree to specify how the Aspeed >> watchdog timer's reset mask register(s) should be set, so that >> peripherals can be individually exempted from (or opted in to) being >> reset when the watchdog timer expires. >> >> Signed-off-by: Zev Weiss > >Reviewed-by: Joel Stanley > >A note below. > >> --- >> drivers/watchdog/aspeed_wdt.c | 11 +++++++++++ >> 1 file changed, 11 insertions(+) >> >> diff --git a/drivers/watchdog/aspeed_wdt.c b/drivers/watchdog/aspeed_wdt= .c >> index b72a858bbac7..b4773a6aaf8c 100644 >> --- a/drivers/watchdog/aspeed_wdt.c >> +++ b/drivers/watchdog/aspeed_wdt.c >> @@ -79,6 +79,8 @@ MODULE_DEVICE_TABLE(of, aspeed_wdt_of_table); >> #define WDT_TIMEOUT_STATUS_BOOT_SECONDARY BIT(1) >> #define WDT_CLEAR_TIMEOUT_STATUS 0x14 >> #define WDT_CLEAR_TIMEOUT_AND_BOOT_CODE_SELECTION BIT(0) >> +#define WDT_RESET_MASK1 0x1c >> +#define WDT_RESET_MASK2 0x20 >> >> /* >> * WDT_RESET_WIDTH controls the characteristics of the external pulse (= if >> @@ -402,6 +404,8 @@ static int aspeed_wdt_probe(struct platform_device *= pdev) >> >> if ((of_device_is_compatible(np, "aspeed,ast2500-wdt")) || >> (of_device_is_compatible(np, "aspeed,ast2600-wdt"))) { >> + u32 reset_mask[2]; >> + size_t nrstmask =3D of_device_is_compatible(np, "aspeed,= ast2600-wdt") ? 2 : 1; >> u32 reg =3D readl(wdt->base + WDT_RESET_WIDTH); >> >> reg &=3D wdt->cfg->ext_pulse_width_mask; >> @@ -419,6 +423,13 @@ static int aspeed_wdt_probe(struct platform_device = *pdev) >> reg |=3D WDT_OPEN_DRAIN_MAGIC; >> >> writel(reg, wdt->base + WDT_RESET_WIDTH); >> + >> + ret =3D of_property_read_u32_array(np, "aspeed,reset-mas= k", reset_mask, nrstmask); >> + if (!ret) { >> + writel(reset_mask[0], wdt->base + WDT_RESET_MASK= 1); >> + if (nrstmask > 1) >> + writel(reset_mask[1], wdt->base + WDT_RE= SET_MASK2); >> + } > >This will do funky things if someone is careless enough to put the >property in an ast2400 device tree. > >The ast2700 has four reset mask registers. Not really your problem at >this point, but we might need to move to a per-soc callback in the >platform data or similar. > This chunk is within an 'if' block that only runs on ast2500 & ast2600, so it should be safely ignored on anything else. >> } >> >> if (!of_property_read_u32(np, "aspeed,ext-pulse-duration", &dura= tion)) { >> -- >> 2.40.0.5.gf6e3b97ba6d2.dirty >>=