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Thu, 12 Oct 2023 06:05:31 +0000 Date: Thu, 12 Oct 2023 13:56:06 +0800 From: Feng Tang To: "Luck, Tony" CC: "Sang, Oliver" , "oe-lkp@lists.linux.dev" , lkp , "linux-edac@vger.kernel.org" , "Huang, Ying" , "Yin, Fengwei" , Borislav Petkov , "Yazen Ghannam" , "Smita.KoralahalliChannabasappa@amd.com" , "dave.hansen@linux.intel.com" , "x86@kernel.org" , "linux-kernel@vger.kernel.org" , "patches@lists.linux.dev" , Linus Torvalds Subject: Re: [PATCH v9 2/3] x86/mce: Add per-bank CMCI storm mitigation Message-ID: References: <20231004183623.17067-3-tony.luck@intel.com> <202310111637.dee70328-oliver.sang@intel.com> Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: X-ClientProxiedBy: SG2PR04CA0154.apcprd04.prod.outlook.com (2603:1096:4::16) To MN0PR11MB6304.namprd11.prod.outlook.com (2603:10b6:208:3c0::7) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MN0PR11MB6304:EE_|CH0PR11MB5265:EE_ X-MS-Office365-Filtering-Correlation-Id: 4f69ee32-2fb6-4b58-a7f8-08dbcae93cf7 X-LD-Processed: 46c98d88-e344-4ed4-8496-4ed7712e255d,ExtAddr X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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Wed, 11 Oct 2023 23:05:51 -0700 (PDT) On Thu, Oct 12, 2023 at 01:36:41PM +0800, Feng Tang wrote: > On Thu, Oct 12, 2023 at 01:23:54AM +0800, Luck, Tony wrote: > > > IIRC, CONFIG_DEBUG_FORCE_FUNCTION_ALIGN_64B was enabled in 0Day's > > > kernel config for quite a while, to force each funtion's start > > > address aligned on 64 bytes. Don't know if this has been changed > > > recently. > > > > > > Also I noticed the patch introduce a new per-cpu variable 'storm_desc", > > > if the function address is 64B aligned, then per-cpu data alignment > > > may be related. > > > > If adding (removing, changing) per-cpu variables can cause 8% performance > > changes, then maybe there needs to be some way to insulate the builds > > from these side effects (as was done with the 64-byte function alignment). > > I've no ideas on how to achieve that :-( As for mitigation (how to reduce these kind of strange performance changes), I have proposed a "selective isolation" in LPC 2021, in page 15 of https://lpc.events/event/11/contributions/895/attachments/770/1603/Strange_kernel_performance_changes_lpc_2021.pdf As kernel binary is compactly linked together, the alignment change of text/data in earlier modules could affect other modules after them. MCE module is much easier to hit these strange performance changes, just because it sit in arch/ folder and get linked early in kernel binary. The idea of "selective isolation" is simple, by picking some modules sparsely and enforce some alignment to function/data/per-cpu data, so that they can act as fences/borders, separate kernel into multiple capsules, and make the alignment changes only take effect inside that specific capsule. Any thoughts? thanks! - Feng > Philip helped to clarify that 0Day kernel build does enable the 64 bytes > function address alignment. [...]