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[92.176.231.205]) by smtp.gmail.com with ESMTPSA id q15-20020a5d574f000000b00323384e04e8sm17558032wrw.111.2023.10.12.01.02.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 12 Oct 2023 01:02:36 -0700 (PDT) From: Javier Martinez Canillas To: Thomas Zimmermann , linux-kernel@vger.kernel.org Cc: dri-devel@lists.freedesktop.org, Maxime Ripard , Geert Uytterhoeven , Conor Dooley , Peter Robinson Subject: Re: [PATCH v2 2/6] drm/ssd130x: Add a per controller family functions table In-Reply-To: References: <20231012065822.1007930-1-javierm@redhat.com> <20231012065822.1007930-3-javierm@redhat.com> Date: Thu, 12 Oct 2023 10:02:35 +0200 Message-ID: <87a5so46as.fsf@minerva.mail-host-address-is-not-set> MIME-Version: 1.0 Content-Type: text/plain X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on morse.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (morse.vger.email [0.0.0.0]); Thu, 12 Oct 2023 01:03:33 -0700 (PDT) Thomas Zimmermann writes: Hello Thomas, Thanks a lot for your feedback. > Hi Javier > > Am 12.10.23 um 08:58 schrieb Javier Martinez Canillas: > [...] >> >> +struct ssd130x_funcs { >> + int (*init)(struct ssd130x_device *ssd130x); >> + int (*set_buffer_sizes)(struct ssd130x_device *ssd130x); >> + void (*align_rect)(struct ssd130x_device *ssd130x, struct drm_rect *rect); >> + int (*update_rect)(struct ssd130x_device *ssd130x, struct drm_rect *rect, >> + u8 *buf, u8 *data_array); >> + void (*clear_screen)(struct ssd130x_device *ssd130x, >> + u8 *data_array); >> + void (*fmt_convert)(struct iosys_map *dst, const unsigned int *dst_pitch, >> + const struct iosys_map *src, const struct drm_framebuffer *fb, >> + const struct drm_rect *clip); >> +}; >> + > > You are reinventing DRM's atomic helpers. I strongly advised against > doing that, as it often turns out bad. Maybe see my rant at [1] wrt to > another driver. > > It's much better to create a separate mode-setting pipeline for the > ssd132x series and share the common code among pipelines. Your driver > will have a clean and readable implementation for each supported > chipset. Compare an old version of mgag200 [2] with the current driver > to see the difference. > I see what you mean. The reason why I didn't go that route was to minimize code duplication, but you are correct that each level of indirection makes the driver harder to read, to reason about and fragile (modifying a common callback could have undesired effects on other chip families as you said). I'll give it a try to what you propose in v3, have separate modesetting pipeline for SSD130x and SSD132x, even if this could lead to a little more duplicated code. > Best regards > Thomas > -- Best regards, Javier Martinez Canillas Core Platforms Red Hat