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Date:   Thu, 12 Oct 2023 15:41:20 +0530
From:   Varadarajan Narayanan <quic_varada@quicinc.com>
To:     Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
CC:     <ilia.lin@kernel.org>, <agross@kernel.org>, <andersson@kernel.org>,
        <konrad.dybcio@linaro.org>, <rafael@kernel.org>,
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        <quic_kathirav@quicinc.com>, <linux-pm@vger.kernel.org>,
        <linux-arm-msm@vger.kernel.org>, <devicetree@vger.kernel.org>,
        <linux-kernel@vger.kernel.org>, <linux-clk@vger.kernel.org>
Subject: Re: [PATCH v1 07/10] arm64: dts: qcom: ipq5332: populate the opp
 table based on the eFuse
Message-ID: <20231012101119.GA32310@varda-linux.qualcomm.com>
References: <cover.1693996662.git.quic_varada@quicinc.com>
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 <20231005095744.GA29795@varda-linux.qualcomm.com>
 <CAA8EJpr124fymnbZ1bO=Dbbxavn3Z=1xOPmFRPnfSp-UB3p6OQ@mail.gmail.com>
 <20231005144205.GB29795@varda-linux.qualcomm.com>
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On Thu, Oct 05, 2023 at 10:39:55PM +0300, Dmitry Baryshkov wrote:
> On Thu, 5 Oct 2023 at 17:42, Varadarajan Narayanan
> <quic_varada@quicinc.com> wrote:
> >
> > On Thu, Oct 05, 2023 at 02:39:43PM +0300, Dmitry Baryshkov wrote:
> > > On Thu, 5 Oct 2023 at 12:58, Varadarajan Narayanan
> > > <quic_varada@quicinc.com> wrote:
> > > >
> > > > On Thu, Sep 07, 2023 at 04:59:28PM +0300, Dmitry Baryshkov wrote:
> > > > > On Thu, 7 Sept 2023 at 08:23, Varadarajan Narayanan
> > > > > <quic_varada@quicinc.com> wrote:
> > > > > >
> > > > > > IPQ53xx have different OPPs available for the CPU based on
> > > > > > SoC variant. This can be determined through use of an eFuse
> > > > > > register present in the silicon.
> > > > > >
> > > > > > Add support to read the eFuse and populate the OPPs based on it.
> > > > > >
> > > > > > Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com>
> > > > > > Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
> > > > > > ---
> > > > > >  arch/arm64/boot/dts/qcom/ipq5332.dtsi | 34 +++++++++++++++++++++++++++++++---
> > > > > >  1 file changed, 31 insertions(+), 3 deletions(-)
> > > > > >
> > > > > > diff --git a/arch/arm64/boot/dts/qcom/ipq5332.dtsi b/arch/arm64/boot/dts/qcom/ipq5332.dtsi
> > > > > > index 82761ae..3ca3f34 100644
> > > > > > --- a/arch/arm64/boot/dts/qcom/ipq5332.dtsi
> > > > > > +++ b/arch/arm64/boot/dts/qcom/ipq5332.dtsi
> > > > > > @@ -91,11 +91,34 @@
> > > > > >         };
> > > > > >
> > > > > >         cpu_opp_table: opp-table-cpu {
> > > > > > -               compatible = "operating-points-v2";
> > > > > > +               compatible = "operating-points-v2-kryo-cpu";
> > > > > >                 opp-shared;
> > > > > > +               nvmem-cells = <&cpu_speed_bin>;
> > > > > > +               nvmem-cell-names = "speed_bin";
> > > > > > +
> > > > > > +               /*
> > > > > > +                * Listed all supported CPU frequencies and opp-supported-hw
> > > > > > +                * values to select CPU frequencies based on the limits fused.
> > > > > > +                * ------------------------------------------------------------
> > > > > > +                * Frequency     BIT3   BIT2   BIT1    BIT0    opp-supported-hw
> > > > > > +                *              1.0GHz 1.2GHz 1.5GHz No Limit
> > > > > > +                * ------------------------------------------------------------
> > > > > > +                * 1100000000     1      1      1       1            0xF
> > > > > > +                * 1500000000     0      0      1       1            0x3
> > > > > > +                * -----------------------------------------------------------
> > > > > > +                */
> > > > >
> > > > > This can probably go to the commit message instead.
> > > >
> > > > Ok
> > > >
> > > > > > +
> > > > > > +               opp-1100000000 {
> > > > > > +                       opp-hz = /bits/ 64 <1100000000>;
> > > > >
> > > > > But your table shows 1.0 GHz and 1.2 GHz instead of 1.1 GHz
> > > >
> > > > Will update it.
> > > >
> > > > > > +                       opp-microvolt = <850000>;
> > > > > > +                       opp-supported-hw = <0xF>;
> > > > > > +                       clock-latency-ns = <200000>;
> > > > > > +               };
> > > > > >
> > > > > > -               opp-1488000000 {
> > > > > > -                       opp-hz = /bits/ 64 <1488000000>;
> > > > > > +               opp-1500000000 {
> > > > > > +                       opp-hz = /bits/ 64 <1500000000>;
> > > > >
> > > > > So, 1.488 GHz or 1.5 GHz?
> > > >
> > > > 1.5 GHz
> > > >
> > > > > > +                       opp-microvolt = <950000>;
> > > > >
> > > > > Which regulator is controlled by this microvolt?
> > > >
> > > > Based on the SKU, the XBL sets up the regulator to provide 950000uV
> > > > on CPUs capable of running 1.5G and 850000uV on other SKUs. Linux
> > > > doesn't control it.
> > >
> > > Then why do you need this property here in the first place?
> >
> > I get these errors without this property
> >
> > [    1.018065] cpu cpu0: opp_parse_microvolt: opp-microvolt missing although OPP managing regulators
>
> But you have said that "Linux doesn't control it" [the regulator]!

Got confused between the ipq9574 and ipq5332 patches.
Have removed and addressed other comments too and
posted v2 - https://lore.kernel.org/linux-arm-msm/cover.1697101543.git.quic_varada@quicinc.com/

Please take a look.

Thanks
Varada
>
> > [    1.018074] cpu cpu0: _of_add_opp_table_v2: Failed to add OPP, -22