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Date:   Thu, 12 Oct 2023 14:49:07 +0100
From:   Conor Dooley <conor@kernel.org>
To:     =?iso-8859-1?Q?Cl=E9ment_L=E9ger?= <cleger@rivosinc.com>
Cc:     linux-riscv@lists.infradead.org, devicetree@vger.kernel.org,
        linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org,
        Palmer Dabbelt <palmer@rivosinc.com>,
        Paul Walmsley <paul.walmsley@sifive.com>,
        Rob Herring <robh+dt@kernel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        Albert Ou <aou@eecs.berkeley.edu>,
        Jonathan Corbet <corbet@lwn.net>,
        Andrew Jones <ajones@ventanamicro.com>,
        Evan Green <evan@rivosinc.com>
Subject: Re: [PATCH v1 07/13] dt-bindings: riscv: add Zfh/Zfhmin ISA
 extensions description
Message-ID: <20231012-destiny-saggy-52f9cd1fa1c1@spud>
References: <20231011111438.909552-1-cleger@rivosinc.com>
 <20231011111438.909552-8-cleger@rivosinc.com>
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Yo,

On Wed, Oct 11, 2023 at 01:14:32PM +0200, Cl=E9ment L=E9ger wrote:
> Add description of Zfh and Zfhmin ISA extensions[1] which can now be
> reported through hwprobe for userspace usage.
>=20
> [1] https://drive.google.com/file/d/1z3tQQLm5ALsAD77PM0l0CHnapxWCeVzP/view
>=20
Same here about using Link: tags.
Acked-by: Conor Dooley <conor.dooley@microchip.com>

Thanks,
Conor.

> Signed-off-by: Cl=E9ment L=E9ger <cleger@rivosinc.com>
> ---
>  .../devicetree/bindings/riscv/extensions.yaml       | 13 +++++++++++++
>  1 file changed, 13 insertions(+)
>=20
> diff --git a/Documentation/devicetree/bindings/riscv/extensions.yaml b/Do=
cumentation/devicetree/bindings/riscv/extensions.yaml
> index 4002c65145c9..4c923800d751 100644
> --- a/Documentation/devicetree/bindings/riscv/extensions.yaml
> +++ b/Documentation/devicetree/bindings/riscv/extensions.yaml
> @@ -190,6 +190,19 @@ properties:
>              instructions as ratified at commit 6d33919 ("Merge pull requ=
est #158
>              from hirooih/clmul-fix-loop-end-condition") of riscv-bitmani=
p.
> =20
> +        - const: zfh
> +          description:
> +            The standard Zfh extension for 16-bit half-precision binary
> +            floating-point instructions, as ratified in commit 64074bc (=
"Update
> +            version numbers for Zfh/Zfinx") of riscv-isa-manual.
> +
> +        - const: zfhmin
> +          description:
> +            The standard Zfhmin extension which provides minimal support=
 for
> +            16-bit half-precision binary floating-point instructions, as=
 ratified
> +            in commit 64074bc ("Update version numbers for Zfh/Zfinx") of
> +            riscv-isa-manual.
> +
>          - const: zicbom
>            description:
>              The standard Zicbom extension for base cache management oper=
ations as
> --=20
> 2.42.0
>=20

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