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[209.85.128.172]) by smtp.gmail.com with ESMTPSA id v83-20020a814856000000b005a7d50b7edfsm1503222ywa.142.2023.10.12.07.36.47 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 12 Oct 2023 07:36:47 -0700 (PDT) Received: by mail-yw1-f172.google.com with SMTP id 00721157ae682-59f6441215dso12712287b3.2; Thu, 12 Oct 2023 07:36:47 -0700 (PDT) X-Received: by 2002:a0d:ce02:0:b0:59b:ec11:7734 with SMTP id q2-20020a0dce02000000b0059bec117734mr25998262ywd.39.1697121407643; Thu, 12 Oct 2023 07:36:47 -0700 (PDT) MIME-Version: 1.0 References: <20231010132701.1658737-1-claudiu.beznea.uj@bp.renesas.com> <20231010132701.1658737-5-claudiu.beznea.uj@bp.renesas.com> In-Reply-To: <20231010132701.1658737-5-claudiu.beznea.uj@bp.renesas.com> From: Geert Uytterhoeven Date: Thu, 12 Oct 2023 16:36:34 +0200 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH 4/6] arm64: dts: renesas: rzg3s-smarc-som: Enable SDHI2 To: Claudiu Cc: magnus.damm@gmail.com, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, mturquette@baylibre.com, sboyd@kernel.org, linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, Claudiu Beznea Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8BIT X-Spam-Status: No, score=-0.8 required=5.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on agentk.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (agentk.vger.email [0.0.0.0]); Thu, 12 Oct 2023 07:37:04 -0700 (PDT) Hi Claudiu, Thanks for your patch! On Tue, Oct 10, 2023 at 3:27 PM Claudiu wrote: > From: Claudiu Beznea > > Add SDHI2 to RZ/G3S Smarc SoM. SDHI2 pins are multiplexed with SCIF1, SSI3, SSI0 > IRQ0. The selection b/w SDHI2 and SCIF1, SSI3, IRQ0 is done with a switch and IRQ1 (twice). Or just say "The selection is done ...". > button. To be able to select b/w these a compilation flag has been added > (SW_SD2_EN) at the moment being instantiated to select SDHI2. > > Signed-off-by: Claudiu Beznea > --- a/arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi > +++ b/arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi > @@ -13,14 +13,21 @@ > * @SW_SD0_DEV_SEL: > * 0 - SD0 is connected to eMMC > * 1 - SD0 is connected to uSD0 card > + * @SW_SD2_EN: > + * 0 - SCIF1, SSI3, IRQ0, IRQ1 connected to SoC SSI0 > + * 1 - SD2 is connected to SoC > */ > #define SW_SD0_DEV_SEL 1 > +#define SW_SD2_EN 1 > @@ -100,6 +125,19 @@ &sdhi0 { > }; > #endif > > +#if SW_SD2_EN > +&sdhi2 { > + pinctrl-0 = <&sdhi2_pins>; > + pinctrl-1 = <&sdhi2_pins>; > + pinctrl-names = "default", "state_uhs"; Do you need two states if there is only a single voltage? AFAIK, UHS needs 1.8V. > + vmmc-supply = <&vcc_sdhi2>; > + vqmmc-supply = <®_3p3v>; > + bus-width = <4>; > + max-frequency = <50000000>; > + status = "okay"; > +}; > +#endif > + > &pinctrl { > sdhi0_pins: sd0 { > data { Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds