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[209.85.128.178]) by smtp.gmail.com with ESMTPSA id z96-20020a25a169000000b00d8128f9a46bsm2632ybh.37.2023.10.12.07.44.19 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 12 Oct 2023 07:44:19 -0700 (PDT) Received: by mail-yw1-f178.google.com with SMTP id 00721157ae682-5a7ba0828efso13058287b3.3; Thu, 12 Oct 2023 07:44:19 -0700 (PDT) X-Received: by 2002:a0d:e2c4:0:b0:5a7:bc38:fff2 with SMTP id l187-20020a0de2c4000000b005a7bc38fff2mr8513742ywe.15.1697121859775; Thu, 12 Oct 2023 07:44:19 -0700 (PDT) MIME-Version: 1.0 References: <20231010132701.1658737-1-claudiu.beznea.uj@bp.renesas.com> <20231010132701.1658737-6-claudiu.beznea.uj@bp.renesas.com> In-Reply-To: <20231010132701.1658737-6-claudiu.beznea.uj@bp.renesas.com> From: Geert Uytterhoeven Date: Thu, 12 Oct 2023 16:44:08 +0200 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH 5/6] arm64: dts: renesas: rzg3s-smarc: Enable SDHI1 To: Claudiu Cc: magnus.damm@gmail.com, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, mturquette@baylibre.com, sboyd@kernel.org, linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, Claudiu Beznea Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8BIT X-Spam-Status: No, score=-0.8 required=5.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on fry.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (fry.vger.email [0.0.0.0]); Thu, 12 Oct 2023 07:44:42 -0700 (PDT) Hi Claudiu, On Tue, Oct 10, 2023 at 3:27 PM Claudiu wrote: > From: Claudiu Beznea > > Add SDHI1 to RZ/G3S Smarc Carrier-II board. This is connected to a uSD > interface. Although Vccq doesn't cross the boundary of SoM it has > been added to RZ/G3S Smarc Carrier-II dtsi to have all the bits related to > SDHI1 in a single place. At the moment SoM is used only with RZ/G3S Smarc > Carrier-II board. > > Signed-off-by: Claudiu Beznea Thanks for your patch! > --- a/arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi > +++ b/arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi > @@ -11,6 +11,27 @@ > / { > aliases { > serial0 = &scif0; > + mmc1 = &sdhi1; > + }; > + > + /* Reserved regulators 0-9 for SoM. */ > + vcc_sdhi1: regulator10 { You can use sensible names for the regulators to avoid conflicts. E.g. "regulator-vcc-sdhi1". The rest LGTM. Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds