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[2620:137:e000::3:5]) by mx.google.com with ESMTPS id jm7-20020a17090304c700b001bf0916b665si2513193plb.393.2023.10.12.10.46.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 12 Oct 2023 10:46:23 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:5 as permitted sender) client-ip=2620:137:e000::3:5; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20230601 header.b=F7oqfkPu; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:5 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by groat.vger.email (Postfix) with ESMTP id 4D8758080EDC; Thu, 12 Oct 2023 10:45:19 -0700 (PDT) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.10 at groat.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1379549AbjJLRpG (ORCPT + 99 others); Thu, 12 Oct 2023 13:45:06 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38684 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1344050AbjJLRpF (ORCPT ); Thu, 12 Oct 2023 13:45:05 -0400 Received: from mail-lf1-x12e.google.com (mail-lf1-x12e.google.com [IPv6:2a00:1450:4864:20::12e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 574D0B8 for ; Thu, 12 Oct 2023 10:45:03 -0700 (PDT) Received: by mail-lf1-x12e.google.com with SMTP id 2adb3069b0e04-5068dab8c00so1675061e87.0 for ; Thu, 12 Oct 2023 10:45:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1697132701; x=1697737501; darn=vger.kernel.org; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:from:to:cc:subject:date :message-id:reply-to; bh=eZnELMSWSCox5zkDrPZguBSaHcnzom5VtqzW5cdzO/Q=; b=F7oqfkPuWtWsD0tilnmahIZJKAbQiTxQhvJR7T0iwI8SbM81dbjk1xsYhaEhs/eToS pwNOulxdFL/MvHMwu3NkDKBklFXMxSvm7oJ7KllvzZmAEywCpf2qIDOAH57IKp0X3WwF dUOayWXroHoiD9ciX7cU+H2e4i/z3XN1c9PIxTD2JpFhluFdjYb6eSonLdx1odZsk3Rq lJj7sWYhAe0gPeNa0F00S8+3e+mWSumW1moYVe8dL4dgqe1uxdZbbVhW9jRGyz9PjDSO rGfpYV6IpkpiXgjXy0dYBSDtSAjfR4lJwm7fSKtenW6ydYk3qUGcPHP3lIzCMjxPSz+U bXyg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1697132701; x=1697737501; h=content-transfer-encoding:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=eZnELMSWSCox5zkDrPZguBSaHcnzom5VtqzW5cdzO/Q=; b=kbHAtSzQtig7qQa4elxWThLlvJ+BKX/2msZmRc2FMGP0h/UScF4Te2nKK0vKkTLS4z 0OvGA1KjUjzcFs8gwlt3m9mWbl9QrKoIr9+JX01Pyy3M7Wa/HN8KwJcqG0b5RUbmyN7/ WSNed+qquE/MNoehYbZa0n+3R8NHd/45ZcaqojGdoY92FRyQPyEqkr5d4nos82SLmVul gLEUTFApDv1NZWfHBGkCHt36x+rjnJL8CG4KkqHaJ4KIurtXJNW4KhTzwionCcULzJCw aNF6TsI4kRieG0Vh+jGeXQStIruU21L/+0dQvJGKT9+nDm6kkczMNpSppsNhTA8arAnW OOoQ== X-Gm-Message-State: AOJu0YyhtDjoVN+YzdZ8iZwdCJsQbwD+t4XoIRfcdn46KAXnX/tsGjtK k/8gZPlhAzyjYuawLhSgjo/KRCDa9/AeDfWsuZBLDq8= X-Received: by 2002:a05:6512:2821:b0:502:f2a8:d391 with SMTP id cf33-20020a056512282100b00502f2a8d391mr28965256lfb.45.1697132701302; Thu, 12 Oct 2023 10:45:01 -0700 (PDT) MIME-Version: 1.0 References: <20231012161237.114733-1-ubizjak@gmail.com> <20231012161237.114733-2-ubizjak@gmail.com> In-Reply-To: <20231012161237.114733-2-ubizjak@gmail.com> From: Brian Gerst Date: Thu, 12 Oct 2023 13:44:49 -0400 Message-ID: Subject: Re: [PATCH 1/4] x86/percpu: Use explicit segment registers in lib/cmpxchg{8,16}b_emu.S To: Uros Bizjak Cc: x86@kernel.org, xen-devel@lists.xenproject.org, linux-kernel@vger.kernel.org, Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" , Peter Zijlstra Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Spam-Status: No, score=-0.6 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on groat.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (groat.vger.email [0.0.0.0]); Thu, 12 Oct 2023 10:45:19 -0700 (PDT) On Thu, Oct 12, 2023 at 12:13=E2=80=AFPM Uros Bizjak wr= ote: > > PER_CPU_VAR macro is intended to be applied to a symbol, it is not > intended to be used as a selector between %fs and %gs segment > registers for general operands. > > The address to these emulation functions is passed in a register, so > use explicit segment registers to access percpu variable instead. > > Also add a missing function comment to this_cpu_cmpxchg8b_emu. > > No functional changes intended. > > Cc: Thomas Gleixner > Cc: Ingo Molnar > Cc: Borislav Petkov > Cc: Dave Hansen > Cc: "H. Peter Anvin" > Cc: Peter Zijlstra > Signed-off-by: Uros Bizjak > --- > arch/x86/lib/cmpxchg16b_emu.S | 12 ++++++------ > arch/x86/lib/cmpxchg8b_emu.S | 30 +++++++++++++++++++++--------- > 2 files changed, 27 insertions(+), 15 deletions(-) > > diff --git a/arch/x86/lib/cmpxchg16b_emu.S b/arch/x86/lib/cmpxchg16b_emu.= S > index 6962df315793..2bd8b89bce75 100644 > --- a/arch/x86/lib/cmpxchg16b_emu.S > +++ b/arch/x86/lib/cmpxchg16b_emu.S > @@ -23,14 +23,14 @@ SYM_FUNC_START(this_cpu_cmpxchg16b_emu) > cli > > /* if (*ptr =3D=3D old) */ > - cmpq PER_CPU_VAR(0(%rsi)), %rax > + cmpq %gs:(%rsi), %rax > jne .Lnot_same > - cmpq PER_CPU_VAR(8(%rsi)), %rdx > + cmpq %gs:8(%rsi), %rdx > jne .Lnot_same > > /* *ptr =3D new */ > - movq %rbx, PER_CPU_VAR(0(%rsi)) > - movq %rcx, PER_CPU_VAR(8(%rsi)) > + movq %rbx, %gs:(%rsi) > + movq %rcx, %gs:8(%rsi) > > /* set ZF in EFLAGS to indicate success */ > orl $X86_EFLAGS_ZF, (%rsp) > @@ -42,8 +42,8 @@ SYM_FUNC_START(this_cpu_cmpxchg16b_emu) > /* *ptr !=3D old */ > > /* old =3D *ptr */ > - movq PER_CPU_VAR(0(%rsi)), %rax > - movq PER_CPU_VAR(8(%rsi)), %rdx > + movq %gs:(%rsi), %rax > + movq %gs:8(%rsi), %rdx > > /* clear ZF in EFLAGS to indicate failure */ > andl $(~X86_EFLAGS_ZF), (%rsp) > diff --git a/arch/x86/lib/cmpxchg8b_emu.S b/arch/x86/lib/cmpxchg8b_emu.S > index 49805257b125..b7d68d5e2d31 100644 > --- a/arch/x86/lib/cmpxchg8b_emu.S > +++ b/arch/x86/lib/cmpxchg8b_emu.S > @@ -24,12 +24,12 @@ SYM_FUNC_START(cmpxchg8b_emu) > pushfl > cli > > - cmpl 0(%esi), %eax > + cmpl (%esi), %eax > jne .Lnot_same > cmpl 4(%esi), %edx > jne .Lnot_same > > - movl %ebx, 0(%esi) > + movl %ebx, (%esi) > movl %ecx, 4(%esi) > > orl $X86_EFLAGS_ZF, (%esp) > @@ -38,7 +38,7 @@ SYM_FUNC_START(cmpxchg8b_emu) > RET > > .Lnot_same: > - movl 0(%esi), %eax > + movl (%esi), %eax > movl 4(%esi), %edx > > andl $(~X86_EFLAGS_ZF), (%esp) > @@ -53,18 +53,30 @@ EXPORT_SYMBOL(cmpxchg8b_emu) > > #ifndef CONFIG_UML > > +/* > + * Emulate 'cmpxchg8b %fs:(%esi)' > + * > + * Inputs: > + * %esi : memory location to compare > + * %eax : low 32 bits of old value > + * %edx : high 32 bits of old value > + * %ebx : low 32 bits of new value > + * %ecx : high 32 bits of new value > + * > + * Notably this is not LOCK prefixed and is not safe against NMIs > + */ > SYM_FUNC_START(this_cpu_cmpxchg8b_emu) > > pushfl > cli > > - cmpl PER_CPU_VAR(0(%esi)), %eax > + cmpl %fs:(%esi), %eax > jne .Lnot_same2 > - cmpl PER_CPU_VAR(4(%esi)), %edx > + cmpl %fs:4(%esi), %edx > jne .Lnot_same2 > > - movl %ebx, PER_CPU_VAR(0(%esi)) > - movl %ecx, PER_CPU_VAR(4(%esi)) > + movl %ebx, %fs:(%esi) > + movl %ecx, %fs:4(%esi) > > orl $X86_EFLAGS_ZF, (%esp) > > @@ -72,8 +84,8 @@ SYM_FUNC_START(this_cpu_cmpxchg8b_emu) > RET > > .Lnot_same2: > - movl PER_CPU_VAR(0(%esi)), %eax > - movl PER_CPU_VAR(4(%esi)), %edx > + movl %fs:(%esi), %eax > + movl %fs:4(%esi), %edx > > andl $(~X86_EFLAGS_ZF), (%esp) > > -- > 2.41.0 > This will break on !SMP builds, where per-cpu variables are just regular data and not accessed with a segment prefix. Brian Gerst