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Peter Anvin" To: Uros Bizjak , x86@kernel.org, xen-devel@lists.xenproject.org, linux-kernel@vger.kernel.org CC: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , Peter Zijlstra Subject: =?US-ASCII?Q?Re=3A_=5BPATCH_1/4=5D_x86/percpu=3A_Use_explicit_se?= =?US-ASCII?Q?gment_registers_in_lib/cmpxchg=7B8=2C16=7Db=5Femu=2ES?= User-Agent: K-9 Mail for Android In-Reply-To: <20231012161237.114733-2-ubizjak@gmail.com> References: <20231012161237.114733-1-ubizjak@gmail.com> <20231012161237.114733-2-ubizjak@gmail.com> Message-ID: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable X-Spam-Status: No, score=-0.8 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on pete.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (pete.vger.email [0.0.0.0]); Thu, 12 Oct 2023 14:03:18 -0700 (PDT) On October 12, 2023 9:10:36 AM PDT, Uros Bizjak wrote= : >PER_CPU_VAR macro is intended to be applied to a symbol, it is not >intended to be used as a selector between %fs and %gs segment >registers for general operands=2E > >The address to these emulation functions is passed in a register, so >use explicit segment registers to access percpu variable instead=2E > >Also add a missing function comment to this_cpu_cmpxchg8b_emu=2E > >No functional changes intended=2E > >Cc: Thomas Gleixner >Cc: Ingo Molnar >Cc: Borislav Petkov >Cc: Dave Hansen >Cc: "H=2E Peter Anvin" >Cc: Peter Zijlstra >Signed-off-by: Uros Bizjak >--- > arch/x86/lib/cmpxchg16b_emu=2ES | 12 ++++++------ > arch/x86/lib/cmpxchg8b_emu=2ES | 30 +++++++++++++++++++++--------- > 2 files changed, 27 insertions(+), 15 deletions(-) > >diff --git a/arch/x86/lib/cmpxchg16b_emu=2ES b/arch/x86/lib/cmpxchg16b_em= u=2ES >index 6962df315793=2E=2E2bd8b89bce75 100644 >--- a/arch/x86/lib/cmpxchg16b_emu=2ES >+++ b/arch/x86/lib/cmpxchg16b_emu=2ES >@@ -23,14 +23,14 @@ SYM_FUNC_START(this_cpu_cmpxchg16b_emu) > cli >=20 > /* if (*ptr =3D=3D old) */ >- cmpq PER_CPU_VAR(0(%rsi)), %rax >+ cmpq %gs:(%rsi), %rax > jne =2ELnot_same >- cmpq PER_CPU_VAR(8(%rsi)), %rdx >+ cmpq %gs:8(%rsi), %rdx > jne =2ELnot_same >=20 > /* *ptr =3D new */ >- movq %rbx, PER_CPU_VAR(0(%rsi)) >- movq %rcx, PER_CPU_VAR(8(%rsi)) >+ movq %rbx, %gs:(%rsi) >+ movq %rcx, %gs:8(%rsi) >=20 > /* set ZF in EFLAGS to indicate success */ > orl $X86_EFLAGS_ZF, (%rsp) >@@ -42,8 +42,8 @@ SYM_FUNC_START(this_cpu_cmpxchg16b_emu) > /* *ptr !=3D old */ >=20 > /* old =3D *ptr */ >- movq PER_CPU_VAR(0(%rsi)), %rax >- movq PER_CPU_VAR(8(%rsi)), %rdx >+ movq %gs:(%rsi), %rax >+ movq %gs:8(%rsi), %rdx >=20 > /* clear ZF in EFLAGS to indicate failure */ > andl $(~X86_EFLAGS_ZF), (%rsp) >diff --git a/arch/x86/lib/cmpxchg8b_emu=2ES b/arch/x86/lib/cmpxchg8b_emu= =2ES >index 49805257b125=2E=2Eb7d68d5e2d31 100644 >--- a/arch/x86/lib/cmpxchg8b_emu=2ES >+++ b/arch/x86/lib/cmpxchg8b_emu=2ES >@@ -24,12 +24,12 @@ SYM_FUNC_START(cmpxchg8b_emu) > pushfl > cli >=20 >- cmpl 0(%esi), %eax >+ cmpl (%esi), %eax > jne =2ELnot_same > cmpl 4(%esi), %edx > jne =2ELnot_same >=20 >- movl %ebx, 0(%esi) >+ movl %ebx, (%esi) > movl %ecx, 4(%esi) >=20 > orl $X86_EFLAGS_ZF, (%esp) >@@ -38,7 +38,7 @@ SYM_FUNC_START(cmpxchg8b_emu) > RET >=20 > =2ELnot_same: >- movl 0(%esi), %eax >+ movl (%esi), %eax > movl 4(%esi), %edx >=20 > andl $(~X86_EFLAGS_ZF), (%esp) >@@ -53,18 +53,30 @@ EXPORT_SYMBOL(cmpxchg8b_emu) >=20 > #ifndef CONFIG_UML >=20 >+/* >+ * Emulate 'cmpxchg8b %fs:(%esi)' >+ * >+ * Inputs: >+ * %esi : memory location to compare >+ * %eax : low 32 bits of old value >+ * %edx : high 32 bits of old value >+ * %ebx : low 32 bits of new value >+ * %ecx : high 32 bits of new value >+ * >+ * Notably this is not LOCK prefixed and is not safe against NMIs >+ */ > SYM_FUNC_START(this_cpu_cmpxchg8b_emu) >=20 > pushfl > cli >=20 >- cmpl PER_CPU_VAR(0(%esi)), %eax >+ cmpl %fs:(%esi), %eax > jne =2ELnot_same2 >- cmpl PER_CPU_VAR(4(%esi)), %edx >+ cmpl %fs:4(%esi), %edx > jne =2ELnot_same2 >=20 >- movl %ebx, PER_CPU_VAR(0(%esi)) >- movl %ecx, PER_CPU_VAR(4(%esi)) >+ movl %ebx, %fs:(%esi) >+ movl %ecx, %fs:4(%esi) >=20 > orl $X86_EFLAGS_ZF, (%esp) >=20 >@@ -72,8 +84,8 @@ SYM_FUNC_START(this_cpu_cmpxchg8b_emu) > RET >=20 > =2ELnot_same2: >- movl PER_CPU_VAR(0(%esi)), %eax >- movl PER_CPU_VAR(4(%esi)), %edx >+ movl %fs:(%esi), %eax >+ movl %fs:4(%esi), %edx >=20 > andl $(~X86_EFLAGS_ZF), (%esp) >=20 %fs??