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[60.250.192.107]) by smtp.gmail.com with ESMTPSA id z125-20020a633383000000b0058a381de499sm2839266pgz.77.2023.10.13.00.44.44 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 13 Oct 2023 00:44:46 -0700 (PDT) Message-ID: Date: Fri, 13 Oct 2023 15:44:43 +0800 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 3/4] arm64: dts: nuvoton: Add pinctrl support for ma35d1 Content-Language: en-US To: Krzysztof Kozlowski , linus.walleij@linaro.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, p.zabel@pengutronix.de, j.neuschaefer@gmx.net Cc: linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, schung@nuvoton.com, Jacky Huang References: <20231011090510.114476-1-ychuang570808@gmail.com> <20231011090510.114476-4-ychuang570808@gmail.com> <9a831a6e-ab5e-4911-8011-f6eb82dd3d6a@linaro.org> <507e491a-e40f-47e2-8e11-5a7886a8c2ab@gmail.com> <420f9132-b277-4476-bd74-9cc4cd87456f@linaro.org> From: Jacky Huang In-Reply-To: <420f9132-b277-4476-bd74-9cc4cd87456f@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-0.6 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on fry.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (fry.vger.email [0.0.0.0]); Fri, 13 Oct 2023 00:45:00 -0700 (PDT) On 2023/10/13 下午 03:06, Krzysztof Kozlowski wrote: > On 13/10/2023 08:52, Jacky Huang wrote: >>>> + >>>> +&pinctrl { >>>> + uart0 { >>>> + pinctrl_uart0: uart0grp { >>>> + nuvoton,pins = >>>> + , >>>> + ; >>> This does not look like generic pinctrl bindings. Looks >>> over-complicated. From where did you get it? Which recent bindings and >>> drivers where used as an example? Register addresses should be in the >>> driver. Bit offsets as well. "multi-pin-function-value" confuses me. All >>> this is not really suitable for DTS. >> Okay, I will update the first and second items to 'pin bank' and 'pin >> bank index, >> just as others have done, and leave the driver to handle the conversion into >> registers and offsets. > Instead use existing common properties, like "pins" and "groups" (or > pinmux). I will reference how others have done it to make the changes. >> The term "multi-pin-function-value" is used to specify the device function. >> I will use the name "device function" instead of "multi-pin-function-value. > Use existing common properties, like "function". Do not reinvent the > bindings. > Okay, I got it. Thank you. > > Best regards, > Krzysztof > Best Regards, Jacky Huang