Received: by 2002:a05:7412:d8a:b0:e2:908c:2ebd with SMTP id b10csp837504rdg; Fri, 13 Oct 2023 02:40:41 -0700 (PDT) X-Google-Smtp-Source: AGHT+IGUt9etvRqVQ80v5y9Dqb6axJgrKSqxfdhCHOHoeQ5rKp+e4yIcaubCpc5EmOMzH8MkCO8a X-Received: by 2002:a05:6a00:814:b0:690:3a0f:4165 with SMTP id m20-20020a056a00081400b006903a0f4165mr30643802pfk.32.1697190040723; Fri, 13 Oct 2023 02:40:40 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1697190040; cv=none; d=google.com; s=arc-20160816; b=STMANNuVlDVqezbrQ5aG97Gq7GIbB0+gii8ENcyztp1in0YTb04HxC2fspMs5CB0zK GNbVZ6FaUPJOhWcfzllmobBmatZhIa7+oQHKdgflwfctbF9jcIpWxPvFlVQnnxCBNTqd JPUt/ffiYlzuFNa1z0m00De1sl+GRsVwZuCrSv2EuN/oK0xlmf2RBFiLVzKQKund97Wl a7UkGFwdIQjpVxWQ7z5VhhOtt3h4qnVKFFSTnE2ScQBS1cMKf5Wyoz0JVlNKOezpMBga XxsYMHx9zuVuUinMEtV4Si1iIA5veag/7KoViI1T81SG/K74R9lPP2Kt3/GmcR6j0w0I lZLw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:robot-unsubscribe :robot-id:message-id:mime-version:references:in-reply-to:cc:subject :to:reply-to:sender:from:dkim-signature:dkim-signature:date; bh=c6wa9XjmLkCQ3qyO7ju+/JngPbdKYlTfNmaJ+JxwaHM=; fh=jyUaMcKccPBGiHulsFQCVYJjDZYW9PU3yBzpCo/OBHs=; b=HEYGmPj74Ot4+LRDNJVi14mCJ6ccisSHfOuRZMNcPWP0Wn90gnVCu7V77SlEaM+Enz +oPjbT11NTBuR99hAmNqyvDX3/obNmoQ7wD3VRaiW63L9e3H4Bued2Nc121eH8m58ERX UaMHaOnEkR41YI0JKtZF9b4uz2fbQPLav0bbm9M+zCvIY3mHRTafGO6B0bX/0lUqDozX aI/ymJvHKbTDV6WI2HYix08NrIrNH1Ix6o09McwffujXppyh4TidrvVrZlKN1HcxOJ58 Wq4/wTa7rOi8yvOz1nA89wJs/B0BJntNfsFDvf/i85awv76skDVAh8TA9P50a6c+p+Vz TXDg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=UDonnchu; dkim=neutral (no key) header.i=@linutronix.de; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:1 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Return-Path: Received: from morse.vger.email (morse.vger.email. [2620:137:e000::3:1]) by mx.google.com with ESMTPS id b22-20020a639316000000b00584c5117901si4364374pge.59.2023.10.13.02.40.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 13 Oct 2023 02:40:40 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:1 as permitted sender) client-ip=2620:137:e000::3:1; Authentication-Results: mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b=UDonnchu; dkim=neutral (no key) header.i=@linutronix.de; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:1 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by morse.vger.email (Postfix) with ESMTP id 58FD6802DBAF; Fri, 13 Oct 2023 02:40:36 -0700 (PDT) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.10 at morse.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231486AbjJMJj0 (ORCPT + 99 others); Fri, 13 Oct 2023 05:39:26 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57458 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231290AbjJMJiR (ORCPT ); Fri, 13 Oct 2023 05:38:17 -0400 Received: from galois.linutronix.de (Galois.linutronix.de [IPv6:2a0a:51c0:0:12e:550::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A3DA4D9; Fri, 13 Oct 2023 02:38:15 -0700 (PDT) Date: Fri, 13 Oct 2023 09:38:13 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1697189894; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=c6wa9XjmLkCQ3qyO7ju+/JngPbdKYlTfNmaJ+JxwaHM=; b=UDonnchuUez1ppBxaRt/5mymEc+wfrxX6KJ0Q21Nj7HP5pKalEQjLnROlq8VHk2UCQjUck oGknHOi/kPoLig/ztjobo0iaYwCNcABn1wx/el3yt9I9ziMzuCjylHwf1ohm621J6uhlq+ /oT8eNwUTP+gJXekZ05dQ6FaR8UGKz7ty0vaNDK8sVwGRBV5f0ul+CJICvN69cZ675SsD4 tA8g/Yh1Cy1uZQ+kec0LdT9DHYUy2+EChbpC0GxjF/v84FtHP87ExFf4CB609b7kIRZA69 /NcaK1zduPB/4lT/IVtujvXmgAAtCfELMelA5tIJazb80p/uXT2wZorYMC32Qg== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1697189894; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=c6wa9XjmLkCQ3qyO7ju+/JngPbdKYlTfNmaJ+JxwaHM=; b=VmysQOnQWHeAUR2dahw4nL40brr8rLfW5s7ZYp37Z2W8sopcB3SUs3yqPKu2GTC0U4bHJw caq12SzT3GT73ZDA== From: "tip-bot2 for Thomas Gleixner" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: x86/core] cpu/SMT: Make SMT control more robust against enumeration failures Cc: Juergen Gross , Thomas Gleixner , Sohil Mehta , Michael Kelley , "Peter Zijlstra (Intel)" , Zhang Rui , x86@kernel.org, linux-kernel@vger.kernel.org In-Reply-To: <20230814085112.149440843@linutronix.de> References: <20230814085112.149440843@linutronix.de> MIME-Version: 1.0 Message-ID: <169718989362.3135.9943655328316153268.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-0.8 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on morse.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (morse.vger.email [0.0.0.0]); Fri, 13 Oct 2023 02:40:36 -0700 (PDT) The following commit has been merged into the x86/core branch of tip: Commit-ID: d91bdd96b55cc3ce98d883a60f133713821b80a6 Gitweb: https://git.kernel.org/tip/d91bdd96b55cc3ce98d883a60f133713821b80a6 Author: Thomas Gleixner AuthorDate: Mon, 14 Aug 2023 10:18:27 +02:00 Committer: Thomas Gleixner CommitterDate: Tue, 10 Oct 2023 14:38:17 +02:00 cpu/SMT: Make SMT control more robust against enumeration failures The SMT control mechanism got added as speculation attack vector mitigation. The implemented logic relies on the primary thread mask to be set up properly. This turns out to be an issue with XEN/PV guests because their CPU hotplug mechanics do not enumerate APICs and therefore the mask is never correctly populated. This went unnoticed so far because by chance XEN/PV ends up with smp_num_siblings == 2. So smt_hotplug_control stays at its default value CPU_SMT_ENABLED and the primary thread mask is never evaluated in the context of CPU hotplug. This stopped "working" with the upcoming overhaul of the topology evaluation which legitimately provides a fake topology for XEN/PV. That sets smp_num_siblings to 1, which causes the core CPU hot-plug core to refuse to bring up the APs. This happens because smt_hotplug_control is set to CPU_SMT_NOT_SUPPORTED which causes cpu_smt_allowed() to evaluate the unpopulated primary thread mask with the conclusion that all non-boot CPUs are not valid to be plugged. Make cpu_smt_allowed() more robust and take CPU_SMT_NOT_SUPPORTED and CPU_SMT_NOT_IMPLEMENTED into account. Rename it to cpu_bootable() while at it as that makes it more clear what the function is about. The primary mask issue on x86 XEN/PV needs to be addressed separately as there are users outside of the CPU hotplug code too. Fixes: 05736e4ac13c ("cpu/hotplug: Provide knobs to control SMT") Reported-by: Juergen Gross Signed-off-by: Thomas Gleixner Tested-by: Juergen Gross Tested-by: Sohil Mehta Tested-by: Michael Kelley Tested-by: Peter Zijlstra (Intel) Tested-by: Zhang Rui Acked-by: Peter Zijlstra (Intel) Link: https://lore.kernel.org/r/20230814085112.149440843@linutronix.de --- kernel/cpu.c | 18 +++++++++++++----- 1 file changed, 13 insertions(+), 5 deletions(-) diff --git a/kernel/cpu.c b/kernel/cpu.c index 6de7c6b..1a189da 100644 --- a/kernel/cpu.c +++ b/kernel/cpu.c @@ -659,11 +659,19 @@ static inline bool cpu_smt_thread_allowed(unsigned int cpu) #endif } -static inline bool cpu_smt_allowed(unsigned int cpu) +static inline bool cpu_bootable(unsigned int cpu) { if (cpu_smt_control == CPU_SMT_ENABLED && cpu_smt_thread_allowed(cpu)) return true; + /* All CPUs are bootable if controls are not configured */ + if (cpu_smt_control == CPU_SMT_NOT_IMPLEMENTED) + return true; + + /* All CPUs are bootable if CPU is not SMT capable */ + if (cpu_smt_control == CPU_SMT_NOT_SUPPORTED) + return true; + if (topology_is_primary_thread(cpu)) return true; @@ -685,7 +693,7 @@ bool cpu_smt_possible(void) EXPORT_SYMBOL_GPL(cpu_smt_possible); #else -static inline bool cpu_smt_allowed(unsigned int cpu) { return true; } +static inline bool cpu_bootable(unsigned int cpu) { return true; } #endif static inline enum cpuhp_state @@ -788,10 +796,10 @@ static int bringup_wait_for_ap_online(unsigned int cpu) * SMT soft disabling on X86 requires to bring the CPU out of the * BIOS 'wait for SIPI' state in order to set the CR4.MCE bit. The * CPU marked itself as booted_once in notify_cpu_starting() so the - * cpu_smt_allowed() check will now return false if this is not the + * cpu_bootable() check will now return false if this is not the * primary sibling. */ - if (!cpu_smt_allowed(cpu)) + if (!cpu_bootable(cpu)) return -ECANCELED; return 0; } @@ -1741,7 +1749,7 @@ static int cpu_up(unsigned int cpu, enum cpuhp_state target) err = -EBUSY; goto out; } - if (!cpu_smt_allowed(cpu)) { + if (!cpu_bootable(cpu)) { err = -EPERM; goto out; }