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Fri, 13 Oct 2023 07:13:01 -0700 (PDT) X-Received: by 2002:a05:620a:678:b0:775:446b:860c with SMTP id a24-20020a05620a067800b00775446b860cmr24362136qkh.70.1697206380802; Fri, 13 Oct 2023 07:13:00 -0700 (PDT) Received: from fedora ([2600:1700:1ff0:d0e0::37]) by smtp.gmail.com with ESMTPSA id y10-20020a37e30a000000b0076dae4753efsm662404qki.14.2023.10.13.07.12.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 13 Oct 2023 07:13:00 -0700 (PDT) Date: Fri, 13 Oct 2023 09:12:58 -0500 From: Andrew Halaney To: Bartosz Golaszewski Cc: Andy Gross , Bjorn Andersson , Konrad Dybcio , Elliot Berman , Krzysztof Kozlowski , Guru Das Srinagesh , Maximilian Luz , Alex Elder , Srini Kandagatla , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kernel@quicinc.com, Bartosz Golaszewski Subject: Re: [PATCH v4 13/15] firmware: qcom: tzmem: enable SHM Bridge support Message-ID: References: <20231013114843.63205-1-brgl@bgdev.pl> <20231013114843.63205-14-brgl@bgdev.pl> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20231013114843.63205-14-brgl@bgdev.pl> X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on fry.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (fry.vger.email [0.0.0.0]); Fri, 13 Oct 2023 07:13:57 -0700 (PDT) On Fri, Oct 13, 2023 at 01:48:41PM +0200, Bartosz Golaszewski wrote: > From: Bartosz Golaszewski > > Add a new Kconfig option for selecting the SHM Bridge mode of operation > for the TrustZone memory allocator. > > If enabled at build-time, it will still be checked for availability at > run-time. If the architecture doesn't support SHM Bridge, the allocator > will work just like in the default mode. > > Signed-off-by: Bartosz Golaszewski > --- > drivers/firmware/qcom/Kconfig | 10 +++++ > drivers/firmware/qcom/qcom_tzmem.c | 65 +++++++++++++++++++++++++++++- > 2 files changed, 74 insertions(+), 1 deletion(-) > > diff --git a/drivers/firmware/qcom/Kconfig b/drivers/firmware/qcom/Kconfig > index 237da40de832..e01407e31ae4 100644 > --- a/drivers/firmware/qcom/Kconfig > +++ b/drivers/firmware/qcom/Kconfig > @@ -27,6 +27,16 @@ config QCOM_TZMEM_MODE_DEFAULT > Use the default allocator mode. The memory is page-aligned, non-cachable > and contiguous. > > +config QCOM_TZMEM_MODE_SHMBRIDGE > + bool "SHM Bridge" > + help > + Use Qualcomm Shared Memory Bridge. The memory has the same alignment as > + in the 'Default' allocator but is also explicitly marked as an SHM Bridge > + buffer. > + > + With this selected, all buffers passed to the TrustZone must be allocated > + using the TZMem allocator or else the TrustZone will refuse to use them. > + > endchoice > > config QCOM_SCM_DOWNLOAD_MODE_DEFAULT > diff --git a/drivers/firmware/qcom/qcom_tzmem.c b/drivers/firmware/qcom/qcom_tzmem.c > index 68ca59c5598e..6c4f29a00f26 100644 > --- a/drivers/firmware/qcom/qcom_tzmem.c > +++ b/drivers/firmware/qcom/qcom_tzmem.c > @@ -55,7 +55,70 @@ static void qcom_tzmem_cleanup_pool(struct qcom_tzmem_pool *pool) > > } > > -#endif /* CONFIG_QCOM_TZMEM_MODE_DEFAULT */ > +#elif IS_ENABLED(CONFIG_QCOM_TZMEM_MODE_SHMBRIDGE) > + > +#include > + > +#define QCOM_SHM_BRIDGE_NUM_VM_SHIFT 9 > + > +static bool qcom_tzmem_using_shm_bridge; > + > +static int qcom_tzmem_init(void) > +{ > + int ret; > + > + ret = qcom_scm_shm_bridge_enable(); > + if (ret == -EOPNOTSUPP) { > + dev_info(qcom_tzmem_dev, "SHM Bridge not supported\n"); > + ret = 0; > + } > + > + if (!ret) > + qcom_tzmem_using_shm_bridge = true; > + > + return ret; > +} Restating the comment we just concluded on in v3 (just to make it obvious for other reviewers), the -EOPNOTSUPP case here should probably return 0, not ret = 0, otherwise we'll try to use SHM bridge on memory later even though it is not supported: https://lore.kernel.org/linux-arm-msm/20231009153427.20951-1-brgl@bgdev.pl/T/#m175bd35782cb5824820977bb3f799b32e32fb2d7 > + > +static int qcom_tzmem_init_pool(struct qcom_tzmem_pool *pool) > +{ > + u64 pfn_and_ns_perm, ipfn_and_s_perm, size_and_flags, ns_perms; > + int ret; > + > + if (!qcom_tzmem_using_shm_bridge) > + return 0; > + > + ns_perms = (QCOM_SCM_PERM_WRITE | QCOM_SCM_PERM_READ); > + pfn_and_ns_perm = (u64)pool->pbase | ns_perms; > + ipfn_and_s_perm = (u64)pool->pbase | ns_perms; > + size_and_flags = pool->size | (1 << QCOM_SHM_BRIDGE_NUM_VM_SHIFT); > + > + u64 *handle __free(kfree) = kzalloc(sizeof(*handle), GFP_KERNEL); > + if (!handle) > + return -ENOMEM; > + > + ret = qcom_scm_shm_bridge_create(qcom_tzmem_dev, pfn_and_ns_perm, > + ipfn_and_s_perm, size_and_flags, > + QCOM_SCM_VMID_HLOS, handle); > + if (ret) > + return ret; > + > + pool->priv = no_free_ptr(handle); > + > + return 0; > +} > + > +static void qcom_tzmem_cleanup_pool(struct qcom_tzmem_pool *pool) > +{ > + u64 *handle = pool->priv; > + > + if (!qcom_tzmem_using_shm_bridge) > + return; > + > + qcom_scm_shm_bridge_delete(qcom_tzmem_dev, *handle); > + kfree(handle); > +} > + > +#endif /* CONFIG_QCOM_TZMEM_MODE_SHMBRIDGE */ > > /** > * qcom_tzmem_pool_new() - Create a new TZ memory pool. > -- > 2.39.2 >