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[31.46.247.178]) by smtp.gmail.com with ESMTPSA id mm12-20020a170906cc4c00b009b2ca104988sm728298ejb.98.2023.10.14.03.04.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 14 Oct 2023 03:04:23 -0700 (PDT) Sender: Ingo Molnar Date: Sat, 14 Oct 2023 12:04:21 +0200 From: Ingo Molnar To: Uros Bizjak Cc: x86@kernel.org, linux-kernel@vger.kernel.org, Linus Torvalds , Nadav Amit , Andy Lutomirski , Brian Gerst , Denys Vlasenko , "H . Peter Anvin" , Peter Zijlstra , Thomas Gleixner , Josh Poimboeuf , Sean Christopherson Subject: Re: [PATCH tip] x86/percpu: Rewrite arch_raw_cpu_ptr() Message-ID: References: <20231011204150.51166-1-ubizjak@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20231011204150.51166-1-ubizjak@gmail.com> X-Spam-Status: No, score=-1.0 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on agentk.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (agentk.vger.email [0.0.0.0]); Sat, 14 Oct 2023 03:12:14 -0700 (PDT) * Uros Bizjak wrote: > Implement arch_raw_cpu_ptr() as a load from this_cpu_off and then > add the ptr value to the base. This way, the compiler can propagate > addend to the following instruction and simplify address calculation. > > E.g.: address calcuation in amd_pmu_enable_virt() improves from: > > 48 c7 c0 00 00 00 00 mov $0x0,%rax > 87b7: R_X86_64_32S cpu_hw_events > > 65 48 03 05 00 00 00 add %gs:0x0(%rip),%rax > 00 > 87bf: R_X86_64_PC32 this_cpu_off-0x4 > > 48 c7 80 28 13 00 00 movq $0x0,0x1328(%rax) > 00 00 00 00 > > to: > > 65 48 8b 05 00 00 00 mov %gs:0x0(%rip),%rax > 00 > 8798: R_X86_64_PC32 this_cpu_off-0x4 > 48 c7 80 00 00 00 00 movq $0x0,0x0(%rax) > 00 00 00 00 > 87a6: R_X86_64_32S cpu_hw_events+0x1328 > > The compiler can also eliminate redundant loads from this_cpu_off, > reducing the number of percpu offset reads (either from this_cpu_off > or with rdgsbase) from 1663 to 1571. > > Additionaly, the patch introduces 'rdgsbase' alternative for CPUs with > X86_FEATURE_FSGSBASE. The rdgsbase instruction *probably* will end up > only decoding in the first decoder etc. But we're talking single-cycle > kind of effects, and the rdgsbase case should be much better from > a cache perspective and might use fewer memory pipeline resources to > offset the fact that it uses an unusual front end decoder resource... So the 'additionally' wording in the changelog should have been a big hint already that the introduction of RDGSBASE usage needs to be a separate patch. ;-) Thanks, Ingo