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Received: from SA1PR01MB8131.prod.exchangelabs.com (2603:10b6:806:325::8) by CH0PR01MB7049.prod.exchangelabs.com (2603:10b6:610:10a::10) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6886.35; Mon, 16 Oct 2023 02:52:29 +0000 Received: from SA1PR01MB8131.prod.exchangelabs.com ([fe80::5dd0:9039:f27d:884c]) by SA1PR01MB8131.prod.exchangelabs.com ([fe80::5dd0:9039:f27d:884c%7]) with mapi id 15.20.6863.043; Mon, 16 Oct 2023 02:52:29 +0000 Message-ID: <4999b3d9-e299-6c0b-0a08-11b33d06a636@amperemail.onmicrosoft.com> Date: Mon, 16 Oct 2023 09:52:17 +0700 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:102.0) Gecko/20100101 Thunderbird/102.15.1 Subject: Re: [PATCH v1] i2c: designware: Disable TX_EMPTY irq while waiting for block length byte Content-Language: en-US To: Yann Sionneau , Tam Nguyen , linux-kernel@vger.kernel.org, linux-i2c@vger.kernel.org Cc: patches@amperecomputing.com, jarkko.nikula@linux.intel.com, andriy.shevchenko@linux.intel.com, mika.westerberg@linux.intel.com, jsd@semihalf.com, chuong@os.amperecomputing.com, darren@os.amperecomputing.com, stable@vger.kernel.org References: <20230929035356.6435-1-tamnguyenchi@os.amperecomputing.com> <9e737b85-95bb-66cd-301c-3a2d1d41f4c8@kalrayinc.com> From: Tam Chi Nguyen In-Reply-To: <9e737b85-95bb-66cd-301c-3a2d1d41f4c8@kalrayinc.com> Content-Type: text/plain; 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Sun, 15 Oct 2023 19:52:44 -0700 (PDT) On 10/3/2023 15:11, Yann Sionneau wrote: > Hi Tam, > > On 9/29/23 05:53, Tam Nguyen wrote: >> During SMBus block data read process, we have seen high interrupt rate >> because of TX_EMPTY irq status while waiting for block length byte (the >> first data byte after the address phase). The interrupt handler does not >> do anything because the internal state is kept as >> STATUS_WRITE_IN_PROGRESS. >> Hence, we should disable TX_EMPTY irq until I2C DW receives first data >> byte from I2C device, then re-enable it. >> >> It takes 0.789 ms for host to receive data length from slave. >> Without the patch, i2c_dw_isr is called 99 times by TX_EMPTY interrupt. >> And it is none after applying the patch. >> >> Cc: stable@vger.kernel.org >> Signed-off-by: Chuong Tran >> Signed-off-by: Tam Nguyen >> --- >>   drivers/i2c/busses/i2c-designware-master.c | 13 +++++++++++++ >>   1 file changed, 13 insertions(+) >> >> diff --git a/drivers/i2c/busses/i2c-designware-master.c >> b/drivers/i2c/busses/i2c-designware-master.c >> index 55ea91a63382..2152b1f9b27c 100644 >> --- a/drivers/i2c/busses/i2c-designware-master.c >> +++ b/drivers/i2c/busses/i2c-designware-master.c >> @@ -462,6 +462,13 @@ i2c_dw_xfer_msg(struct dw_i2c_dev *dev) >>           if (buf_len > 0 || flags & I2C_M_RECV_LEN) { >>               /* more bytes to be written */ >>               dev->status |= STATUS_WRITE_IN_PROGRESS; >> +            /* >> +             * In I2C_FUNC_SMBUS_BLOCK_DATA case, there is no data >> +             * to send before receiving data length from slave. >> +             * Disable TX_EMPTY while waiting for data length byte >> +             */ >> +            if (flags & I2C_M_RECV_LEN) >> +                intr_mask &= ~DW_IC_INTR_TX_EMPTY; >>               break; >>           } else >>               dev->status &= ~STATUS_WRITE_IN_PROGRESS; >> @@ -485,6 +492,7 @@ i2c_dw_recv_len(struct dw_i2c_dev *dev, u8 len) >>   { >>       struct i2c_msg *msgs = dev->msgs; >>       u32 flags = msgs[dev->msg_read_idx].flags; >> +    u32 intr_mask; >>         /* >>        * Adjust the buffer length and mask the flag >> @@ -495,6 +503,11 @@ i2c_dw_recv_len(struct dw_i2c_dev *dev, u8 len) >>       msgs[dev->msg_read_idx].len = len; >>       msgs[dev->msg_read_idx].flags &= ~I2C_M_RECV_LEN; >>   +    /* Re-enable TX_EMPTY interrupt. */ >> +    regmap_read(dev->map, DW_IC_INTR_MASK, &intr_mask); >> +    intr_mask |= DW_IC_INTR_TX_EMPTY; >> +    regmap_write(dev->map, DW_IC_INTR_MASK, intr_mask); >> + >>       return len; >>   } > > I tested this patch on Kalray k200 and k200lp boards (Coolidge SoC, > kvx arch). With this patch all our CI pipelines are green. > Thank you for your time to test this patch. > Tested-by: Yann Sionneau >