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[66.90.144.107]) by smtp.gmail.com with ESMTPSA id d7-20020a05683018e700b006b9a98b9659sm1703547otf.19.2023.10.16.06.47.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 16 Oct 2023 06:47:22 -0700 (PDT) Received: (nullmailer pid 2654785 invoked by uid 1000); Mon, 16 Oct 2023 13:47:20 -0000 Date: Mon, 16 Oct 2023 08:47:20 -0500 From: Rob Herring To: Krzysztof Kozlowski , Sebastian Fricke Cc: Krzysztof Kozlowski , NXP Linux Team , Conor Dooley , Mauro Carvalho Chehab , Jackson Lee , Hans Verkuil , Sascha Hauer , Pengutronix Kernel Team , Shawn Guo , Philipp Zabel , Nas Chung , Fabio Estevam , linux-media@vger.kernel.org, Tomasz Figa , linux-kernel@vger.kernel.org, Nicolas Dufresne , kernel@collabora.com, Robert Beckett , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Darren Etheridge Subject: Re: [PATCH v13 6/8] media: dt-bindings: wave5: add Chips&Media 521c codec IP support Message-ID: <20231016134720.GA2650973-robh@kernel.org> References: <20230929-wave5_v13_media_master-v13-0-5ac60ccbf2ce@collabora.com> <20230929-wave5_v13_media_master-v13-6-5ac60ccbf2ce@collabora.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: X-Spam-Status: No, score=-1.1 required=5.0 tests=BAYES_00, FREEMAIL_ENVFROM_END_DIGIT,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,RCVD_IN_DNSWL_BLOCKED,RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (snail.vger.email [0.0.0.0]); Mon, 16 Oct 2023 06:48:22 -0700 (PDT) On Thu, Oct 12, 2023 at 03:24:12PM +0200, Krzysztof Kozlowski wrote: > On 12/10/2023 13:01, Sebastian Fricke wrote: > > From: Robert Beckett > > > > Add bindings for the chips&media wave5 codec driver > > > > Signed-off-by: Robert Beckett > > Signed-off-by: Dafna Hirschfeld > > Signed-off-by: Sebastian Fricke > > --- > > .../devicetree/bindings/media/cnm,wave5.yaml | 60 ++++++++++++++++++++++ > > 1 file changed, 60 insertions(+) > > > > diff --git a/Documentation/devicetree/bindings/media/cnm,wave5.yaml b/Documentation/devicetree/bindings/media/cnm,wave5.yaml > > new file mode 100644 > > index 000000000000..b31d34aec05b > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/media/cnm,wave5.yaml > > @@ -0,0 +1,60 @@ > > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) > > +%YAML 1.2 > > +--- > > +$id: http://devicetree.org/schemas/media/cnm,wave5.yaml# > > Filename matching compatible, so: cnm,cm521c-vpu.yaml > > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +title: Chips&Media Wave 5 Series multi-standard codec IP > > + > > +maintainers: > > + - Nas Chung > > + - Jackson Lee > > + > > +description: > > + The Chips&Media WAVE codec IP is a multi format video encoder/decoder > > + > > +properties: > > + compatible: > > + enum: > > + - cnm,cm521c-vpu > > Can this device be anything else? Why VPU suffix? It needs an SoC specific compatible (TI something...) as well (or instead). Unless there's a public spec with details on how many clocks, resets, interrupts, etc. there are. Rob