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Mon, 16 Oct 2023 12:47:28 -0700 (PDT) X-Received: by 2002:a05:620a:25ce:b0:777:7240:8de with SMTP id y14-20020a05620a25ce00b00777724008demr146985qko.8.1697485648421; Mon, 16 Oct 2023 12:47:28 -0700 (PDT) Received: from [192.168.43.95] ([37.170.191.221]) by smtp.gmail.com with ESMTPSA id k27-20020a05620a143b00b007742c6823a3sm3226478qkj.108.2023.10.16.12.47.23 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 16 Oct 2023 12:47:27 -0700 (PDT) Message-ID: <20bdc913-57d2-abe9-d222-d77647281b43@redhat.com> Date: Mon, 16 Oct 2023 21:47:21 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.13.0 Subject: Re: [PATCH v7 04/12] KVM: arm64: PMU: Don't define the sysreg reset() for PM{USERENR,CCFILTR}_EL0 Content-Language: en-US To: Raghavendra Rao Ananta , Oliver Upton , Marc Zyngier Cc: Alexandru Elisei , James Morse , Suzuki K Poulose , Paolo Bonzini , Zenghui Yu , Shaoqin Huang , Jing Zhang , Reiji Watanabe , Colton Lewis , linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, linux-kernel@vger.kernel.org, kvm@vger.kernel.org References: <20231009230858.3444834-1-rananta@google.com> <20231009230858.3444834-5-rananta@google.com> From: Eric Auger In-Reply-To: <20231009230858.3444834-5-rananta@google.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-4.2 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,NICE_REPLY_A,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on agentk.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (agentk.vger.email [0.0.0.0]); Mon, 16 Oct 2023 12:48:38 -0700 (PDT) Hi, On 10/10/23 01:08, Raghavendra Rao Ananta wrote: > From: Reiji Watanabe > > The default reset function for PMU registers (defined by PMU_SYS_REG) > now simply clears a specified register. Use the default one for > PMUSERENR_EL0 and PMCCFILTR_EL0, as KVM currently clears those > registers on vCPU reset (NOTE: All non-RES0 fields of those > registers have UNKNOWN reset values, and the same fields of > their AArch32 registers have 0 reset values). > > No functional change intended. > > Signed-off-by: Reiji Watanabe > Signed-off-by: Raghavendra Rao Ananta > --- > arch/arm64/kvm/sys_regs.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c > index 3dbb7d276b0e..08af7824e9d8 100644 > --- a/arch/arm64/kvm/sys_regs.c > +++ b/arch/arm64/kvm/sys_regs.c > @@ -2180,7 +2180,7 @@ static const struct sys_reg_desc sys_reg_descs[] = { > * in 32bit mode. Here we choose to reset it as zero for consistency. > */ > { PMU_SYS_REG(PMUSERENR_EL0), .access = access_pmuserenr, > - .reset = reset_val, .reg = PMUSERENR_EL0, .val = 0 }, > + .reg = PMUSERENR_EL0, }, > { PMU_SYS_REG(PMOVSSET_EL0), > .access = access_pmovs, .reg = PMOVSSET_EL0 }, > > @@ -2338,7 +2338,7 @@ static const struct sys_reg_desc sys_reg_descs[] = { > * in 32bit mode. Here we choose to reset it as zero for consistency. > */ > { PMU_SYS_REG(PMCCFILTR_EL0), .access = access_pmu_evtyper, > - .reset = reset_val, .reg = PMCCFILTR_EL0, .val = 0 }, > + .reg = PMCCFILTR_EL0, }, > > EL2_REG(VPIDR_EL2, access_rw, reset_unknown, 0), > EL2_REG(VMPIDR_EL2, access_rw, reset_unknown, 0), Reviewed-by: Eric Auger Thanks Eric