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Mon, 16 Oct 2023 20:23:30 +0000 Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA03.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 39GKNTDX009969 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 16 Oct 2023 20:23:29 GMT Received: from akhilpo-linux.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.39; Mon, 16 Oct 2023 13:23:22 -0700 Date: Tue, 17 Oct 2023 01:53:19 +0530 From: Akhil P Oommen To: Konrad Dybcio CC: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter , , Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Stephen Boyd , Rob Clark , , , , , Luca Weiss , Marijn Suijten , Subject: Re: [Freedreno] [PATCH 6/7] arm64: dts: qcom: sc7280: Mark Adreno SMMU as DMA coherent Message-ID: <3aseuir2pvvfewb6ot7lxwpzcjfqvboofz5pmkfiveprfybyin@atmuqgmowrq2> References: <20230926-topic-a643-v1-0-7af6937ac0a3@linaro.org> <20230926-topic-a643-v1-6-7af6937ac0a3@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; 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Mon, 16 Oct 2023 13:23:53 -0700 (PDT) On Tue, Sep 26, 2023 at 08:24:41PM +0200, Konrad Dybcio wrote: > > The SMMUs on sc7280 are cache-coherent. APPS_SMMU is marked as such, > mark the GPU one as well. > > Signed-off-by: Konrad Dybcio Reviewed-by: Akhil P Oommen -Akhil > --- > arch/arm64/boot/dts/qcom/sc7280.dtsi | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi > index 0d96d1454c49..edaca6c2cf8c 100644 > --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi > +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi > @@ -2783,6 +2783,7 @@ adreno_smmu: iommu@3da0000 { > "gpu_cc_hub_aon_clk"; > > power-domains = <&gpucc GPU_CC_CX_GDSC>; > + dma-coherent; > }; > > remoteproc_mpss: remoteproc@4080000 { > > -- > 2.42.0 >